GATE 2024 EC Q.18: solution and answer

GATE 2024 · ECQ.18 · 1 mark · MCQ

For the closed loop amplifier circuit shown below, the magnitude of open loop low frequency small signal voltage gain is 40. All the transistors are biased in saturation. The current source $I_{S S}$ is ideal. Neglect body effect, channel length modulation and intrinsic device capacitances. The closed loop low frequency small signal voltage gain $\frac{v _{o u t}}{v _{in}}$ (rounded off to three decimal places) is ____.

GATE 2024 EC question 18: A five-transistor CMOS differential amplifier. — Figure from the GATE 2024 EC paper. It is part of the question.

(A)
0.976
(B)
1.000
(C)
1.025
(D)
0.488

Answer and solution

ANSWER

The closed-loop gain is $\frac{40}{1 + 40} = \frac{40}{41} \approx 0.976$ , so the answer is option (A).

Official answer: ASource: Official answer key, GATE 2024 EC (IISc Bengaluru)

Identify the circuit. This is the standard five-transistor OTA. It has an NMOS differential pair, $M_{1}$ (left) and $M_{2}$ (right), a PMOS current-mirror load, $M_{3}$ (left, diode-connected) and $M_{4}$ (right), and an ideal tail source $I_{S S}$ . The output is taken at the common drain node of $M_{2}$ and $M_{4}$ .
Find the input polarity. Raise the gate voltage of $M_{1}$ . Then $i_{D 1}$ increases, and because the tail current is fixed, $i_{D 2}$ falls by the same amount. The mirror copies the increase in $i_{D 1}$ through $M_{4}$ into the output node, while $M_{2}$ draws less current out of it. So $v_{o u t}$ rises. The gate of $M_{1}$ is therefore the non-inverting input $(+)$ and the gate of $M_{2}$ is the inverting input $(-)$ .
Open-loop model. The tail source is ideal, so a common-mode change on the two gates cannot change the drain currents, and the output responds only to the difference between the gates: $v_{o u t} = A (v_{+} - v_{-})$ . The question gives the open-loop low-frequency gain as $A = 40$ , so no device-level calculation is needed.
Identify the feedback. The output is wired straight to the gate of $M_{2}$ , so $v_{-} = v_{o u t}$ and $v_{+} = v_{in}$ . A MOSFET gate draws no current, so this wire does not load the output. The whole output is fed back to the inverting input, which is negative feedback with $β = 1$ and a loop gain of $T = A β = 40$ . The circuit is a unity-gain buffer built with a finite-gain amplifier.
Closed-loop gain. $v_{o u t} = A (v_{in} - v_{o u t}) \Rightarrow \frac{v _{o u t}}{v _{in}} = \frac{A}{1 + A β} = \frac{40}{1 + 40} = \frac{40}{41}$
Evaluate. $\frac{40}{41} = 0.97561 \dots \approx 0.976$ , which is option (A). The gain falls just short of 1 because the loop gain is finite. The fractional error is $\frac{1}{1 + T} = \frac{1}{41} \approx 2.4%$ .

KEY IDEA

The output of the five-transistor OTA is tied straight to its inverting input, the gate of $M_{2}$ . That makes it a unity-gain buffer with $β = 1$ . With a finite open-loop gain $A$ , the closed-loop gain is $\frac{A}{1 + A}$ , not exactly 1.

WATCH OUT FOR

Answering 1.000 by treating the buffer as ideal, which assumes infinite open-loop gain. Other traps: halving the gain as if the single-ended output of a differential pair gave half, which leads to 0.488; getting the feedback sign wrong or using $1 + 1/ A$ , which leads to about 1.025. Check the polarity first. The gate of $M_{2}$ is the inverting input, so the feedback is negative and the gain is $A / (1 + A) = 40/41$ .

From the GATE 2024 EC paper. Every question of this paper · Download the full paper · All 4 Feedback & oscillators questions, with notes

GATE 2024 EC Q.18: solution and answer

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