A processor has 64 registers and uses 16-bit instruction format. It has two types of instructions: I-type and R-type. Each I-type instruction contains an opcode, a register name, and a 4-bit immediate value. Each R-type instruction contains an opcode and two register names. If there are 8 distinct I-type opcodes, then the maximum number of distinct R-type opcodes is ____.
GATE 2020 CS Q.44: solution and answer
Answer and solution
ANSWER
The maximum number of distinct R-type opcodes is 14.
Official answer: 14Source: Official answer key, GATE 2020 CS (IIT Delhi)
Register field width: with 64 registers, a register name needs bits.
I-type opcode length: an I-type instruction packs an opcode, one register name, and a 4-bit immediate into 16 bits, so the opcode field is bits long.
R-type opcode length: an R-type instruction packs an opcode and two register names into 16 bits, so the opcode field is bits long.
Since I-type and R-type opcodes are read from the same leading bits of a 16-bit word, no R-type opcode (4 bits) may be a bit-prefix of any I-type opcode (6 bits), and vice versa — the full set of opcodes must be a prefix-free (instantaneous) code, exactly as in Huffman coding.
Model all possible opcode bit-strings as leaves of a binary tree of depth 6 (the longest opcode length): there are leaf slots in total.
Each of the 8 chosen I-type opcodes is a full-length (6-bit) codeword, so it occupies exactly 1 leaf slot each: slots used.
Each R-type opcode is only 4 bits long, so to keep the code prefix-free it must reserve every one of its length-6 extensions: leaf slots per R-type opcode.
Leaf slots left after removing the I-type opcodes: .
Maximum number of distinct R-type opcodes: (this is the same bound as Kraft's inequality ).
KEY IDEA
Because opcodes of two different bit-lengths share one fixed-width instruction word, the decoder must be able to tell them apart just by reading bits left to right — the set of all opcodes must form a prefix-free (instantaneous) code, exactly as in Huffman/variable-length coding. Kraft's inequality (equivalently, counting reserved leaf slots in a binary code-tree) then bounds how many short codewords can coexist with the given long ones.
WATCH OUT FOR
Treating the R-type opcode field size (4 bits) as directly giving possible R-type opcodes, ignoring that some of those 4-bit patterns must be excluded because they would otherwise be indistinguishable, as prefixes, from the 6-bit I-type opcodes sharing the same instruction word.
From the GATE 2020 CS paper. Every question of this paper · Download the full paper · All 11 Instructions & addressing questions, with notes
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