MOS devices formulas

${\epsilon }_{ox}=3.9{\epsilon }_0$ for SiO${}_2$; $t_{ox}$ is the oxide thickness. This is the parallel-plate result: it ignores polysilicon-gate depletion and the finite thickness of the inversion layer. Example: $t_{ox}=10\text{ nm}$ gives $C_{ox}=3.45\times 10^{-7}{\text{ F/cm}}^2$.

Valid for a non-degenerate, fully ionised body with $N_A\gg n_i$; ${\varphi }_F>0$ here. For an n-type body (PMOS) the magnitude is $|{\varphi }_F|=V_T\ln (N_D/n_i)$ and ${\varphi }_F$ is negative. Example: $N_A=10^{16}{\text{ cm}}^{-3}$ gives ${\varphi }_F=0.0259\ln (6.67\times 10^5)\approx 0.347\text{ V}$.

${\varphi }_m$ is the gate work function and $\chi$ the electron affinity of Si (about 4.05 V), both in volts. $E_g\approx 1.12\text{ eV}$ for Si at 300 K, and the intrinsic level is taken at midgap. The bracket is the work function of the p-type body. For an n${}^{+}$ polysilicon gate (${\varphi }_m\approx \chi$) this gives ${\varphi }_{ms}\approx -\left(\frac{E_g}{2q}+{\varphi }_F\right)$. For an n-type body, replace $+{\varphi }_F$ by $-|{\varphi }_F|$.

$Q_{ox}$ is the effective oxide charge per unit area (C/cm${}^2$), treated as a sheet at the oxide-silicon interface. Charge located deeper in the oxide, closer to the gate, shifts $V_{FB}$ less. Positive $Q_{ox}$ makes $V_{FB}$ more negative, and negative $Q_{ox}$ makes it more positive.

Depletion width at the onset of strong inversion (${\varphi }_s=2{\varphi }_F$), uniform doping, depletion approximation. In equilibrium (slow gate sweep), it barely grows beyond this, because the inversion charge supports any further gate charge. Under a fast ramp (deep depletion) it can exceed $W_{dm}$.

Charge per unit area of the ionised acceptors in the depletion layer at ${\varphi }_s=2{\varphi }_F$ and $V_{SB}=0$. It is negative for a p-type body.

Uniform body doping, with $Q_{ox}$ included through $V_{FB}$. Equivalently $V_{TH0}=V_{FB}+2{\varphi }_F+|Q_{d,max}|/C_{ox}$.

$|{\varphi }_F|=V_T\ln (N_D/n_i)$. The depletion charge is positive (ionised donors) and the inversion layer is made of holes, so both terms add negatively. $V_{FB}$ uses ${\varphi }_{ms}$ for the n-type body.

$V_{SB}\ge 0$ is the source-to-body reverse bias, and $\gamma$ is the body-effect coefficient (units $\sqrt{\text{V}}$). A larger $V_{SB}$ widens the depletion region and raises $V_{TH}$. So in a stack of NMOS transistors with the body grounded, an upper device (source above ground) has a higher threshold. For PMOS the same form holds with magnitudes: $|V_{TH}|$ grows with $V_{BS}\ge 0$, with $N_D$ and $|{\varphi }_F|$ in place of $N_A$ and ${\varphi }_F$.

$D_I$ is the implanted dose (ions/cm${}^2$), assumed to sit as a thin sheet at the Si surface. An acceptor implant into an NMOS channel raises $V_{TH}$, and a donor implant lowers it.

Charge-sheet approximation, per unit area, for $V_{GS}>V_{TH}$ with $V_{DS}=0$ (uniform channel). With $V_{DS}>0$ the local channel voltage is subtracted from $V_{GS}$, which is where the square-law I-V model comes from.

Isolated MOS capacitor, high test frequency, equilibrium (slow) DC sweep. $W_{dm}$ is the maximum depletion width at ${\varphi }_s=2{\varphi }_F$.

Valid for $V_{GS}>V_{TH}$ and $0\le V_{DS}\le V_{GS}-V_{TH}$. ${\mu }_n$ is the electron mobility in the channel.

For $V_{DS}\ll 2(V_{GS}-V_{TH})$ the $V_{DS}^2$ term is negligible, so the channel acts as a gate-controlled linear resistor.

In this model the inversion charge at the drain end falls to zero at this drain voltage. The triode expression reaches its maximum here, $I_{D,sat}=\frac{1}{2}{\mu }_n{C}_{ox}\frac{W}{L}(V_{GS}-V_{TH}{)}^2$.

Valid for $V_{GS}>V_{TH}$ and $V_{DS}\ge V_{GS}-V_{TH}$. $\lambda$ (1/V) models channel-length modulation: as $V_{DS}$ rises, the pinch-off point moves towards the source and the effective channel shortens. It is larger for shorter channels. With $\lambda =0$, $I_D$ does not depend on $V_{DS}$ in saturation.

Small-signal output resistance caused by channel-length modulation. The approximation holds when $\lambda V_{DS}\ll 1$.

Square-law model in saturation, $\lambda$ neglected. The three forms are equivalent; use whichever matches the given data. In the triode region, $g_m={\mu }_n{C}_{ox}(W/L)V_{DS}$.

The change in $I_D$ per unit change of body-to-source voltage, in saturation. It follows from differentiating the body-effect expression for $V_{TH}$.

In saturation the intrinsic gate-source capacitance is $C_{gs}\approx \frac{2}{3}WL{C}_{ox}$ and the intrinsic $C_{gd}\approx 0$. The approximate form neglects overlap and junction capacitances and uses the square-law $g_m$. $f_T$ rises as $1/L^2$ when the channel is shortened.

Valid for $V_{GS}<V_{TH}$ (weak inversion, where the current is carried by diffusion). $I_0$ is a device-dependent current proportional to $W/L$. The bracket makes $I_D$ practically independent of $V_{DS}$ once $V_{DS}$ exceeds a few $V_T$. $V_T=kT/q$ is the thermal voltage (25.9 mV at 300 K), not the threshold voltage.

Neglects interface-trap capacitance (traps add a further $C_{it}/C_{ox}$). $C_{dep}={\epsilon }_{si}/W_d$ is the depletion capacitance per unit area. A thinner oxide or a lighter body doping brings $n$ closer to 1.

The gate-voltage change needed for a tenfold change in subthreshold current (mV/decade). With $V_T=25.9\text{ mV}$, $V_T\ln 10\approx 59.6\text{ mV}$. Since $n\ge 1$, a conventional MOSFET at 300 K cannot switch more steeply than about 60 mV/decade. $S$ is proportional to absolute temperature.