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GATE 2025 CS2 Q.32: solution and answer

GATE 2025 · CS2Q.32 · 1 mark · NAT

The following two signed 2's complement numbers (multiplicand M and multiplier Q) are being multiplied using Booth's algorithm:

M: 1100 1101 1110 1101 and Q: 1010 0100 1010 1010

The total number of addition and subtraction operations to be performed is ___________. (Answer in integer)

See the question in the paper

Answer and solution

ANSWER

The total number of addition/subtraction operations Booth's algorithm performs while multiplying M by Q is .

Official answer: 13Source: Official answer key, GATE 2025 CS2 (IIT Roorkee)

  1. Booth's algorithm runs for cycles (Q is 16 bits). At each cycle it inspects the pair , where starts at : pair adds M to the partial product, pair subtracts M, and pair or does no arithmetic (only an arithmetic right shift).

  2. Since at cycle is just the original bit (shifted in from the previous cycle), the pair examined at cycle is for , with . So the number of add/subtract operations equals the number of or transitions scanning Q's bits from LSB to MSB with an extra leading — M is irrelevant to this count.

  3. Q = 1010 0100 1010 1010 (MSB to LSB), so reading off individual bits: .

  4. Prefixing gives the sequence .

  5. Comparing each adjacent pair for to : i=0:(0,0) same; i=1:(1,0) diff; i=2:(0,1) diff; i=3:(1,0) diff; i=4:(0,1) diff; i=5:(1,0) diff; i=6:(0,1) diff; i=7:(1,0) diff; i=8:(0,1) diff; i=9:(0,0) same; i=10:(1,0) diff; i=11:(0,1) diff; i=12:(0,0) same; i=13:(1,0) diff; i=14:(0,1) diff; i=15:(1,0) diff.

  6. Same-pairs occur at (3 positions, pure shifts, no arithmetic); every other position () is a diff-pair, giving transitions.

  7. Total addition + subtraction operations .

KEY IDEA

In Booth's algorithm, at each of the cycles the ALU performs add M, subtract M, or nothing, based on the pair (with starting at 0): pair adds M, pair subtracts M, and or do nothing except an arithmetic shift. Because at cycle is just the original bit (shifted in from the previous cycle), the total add/subtract count equals the number of bit-to-bit transitions ( or ) when scanning the multiplier Q from its LSB toward its MSB, with an extra leading prepended — independent of the multiplicand M.

WATCH OUT FOR

Assuming the number of add/subtract operations depends on the multiplicand M, or forgetting to prepend the initial bit — omitting it undercounts the transition at and gives instead of .

From the GATE 2025 CS2 paper. Every question of this paper · Download the full paper · All 5 ALU & control unit questions, with notes

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