GATE 2025 EC Q.44: solution and answer

GATE 2025 · ECQ.44 · 2 marks · MCQ

A 10-bit analog-to-digital converter (ADC) has a sampling frequency of 1 MHz and a full scale voltage of 3.3 V.

For an input sinusoidal signal with frequency 500 kHz, the maximum SNR (in dB, rounded off to two decimal places) and the data rate (in Mbps) at the output of the ADC are ________, respectively.

(A)
61.96 and 10
(B)
61.96 and 5
(C)
33.36 and 10
(D)
33.36 and 5

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Answer and solution

ANSWER

The maximum SNR is $6.02 (10) + 1.76 = 61.96 dB$ and the output data rate is $10 \times 1 MHz = 10 Mbps$ , so the answer is option (A).

Official answer: ASource: Official answer key, GATE 2025 EC (IIT Roorkee)

Maximum SNR of an ideal $n$ -bit ADC. The largest signal is a full-scale sinusoid, with amplitude $\frac{V _{F S}}{2}$ , so its power is $\frac{( V _{F S} /2 ) ^{2}}{2} = \frac{V _{F S}^{2}}{8}$ . The step size is $Δ = \frac{V _{F S}}{2 ^{n}}$ , and the quantisation noise power is $\frac{Δ ^{2}}{12} = \frac{V _{F S}^{2}}{12 \cdot 2 ^{2 n}}$ . Dividing the first by the second gives $SNR = \frac{12 \cdot 2 ^{2 n}}{8} = \frac{3}{2} \cdot 2^{2 n}$ .
In decibels, $SNR_{m a x} = 20 lo g_{10} 2^{n} + 10 lo g_{10} 1.5$ , which is the standard rule $SNR_{m a x} = 6.02 n + 1.76 dB$ The result depends only on $n$ . The full-scale voltage (3.3 V) cancels in the ratio, and the input frequency does not appear at all.
With $n = 10$ : $SNR_{m a x} = 6.02 (10) + 1.76 = 60.20 + 1.76 = 61.96 dB$ . (If you work it exactly, $20 lo g_{10} 2^{10} + 10 lo g_{10} 1.5 = 60.206 + 1.761 \approx 61.97 dB$ . The options use the $6.02 n + 1.76$ form, so 61.96 is the intended value. The other SNR value offered, 33.36 dB, is nowhere near either figure.)
Output data rate. Each sample produces one $n$ -bit output word, so the bit rate is $R_{b} = n f_{s}$ .
$R_{b} = 10 bits/sample \times 1 0^{6} samples/s = 10 Mbps$ . The sampling frequency sets the data rate. The 500 kHz input frequency does not.
The pair is 61.96 dB and 10 Mbps, which is option (A).

KEY IDEA

An ideal $n$ -bit ADC driven by a full-scale sinusoid has $SNR_{m a x} = \frac{3}{2} \cdot 2^{2 n}$ , which is $6.02 n + 1.76$ dB. This depends only on the resolution, not on $V_{F S}$ or the signal frequency. The output bit rate is resolution times sampling rate, $R_{b} = n f_{s}$ .

WATCH OUT FOR

Using the 500 kHz input frequency instead of the 1 MHz sampling frequency for the data rate gives $10 \times 0.5 = 5$ Mbps (options B and D). Another mistake is thinking the 3.3 V full-scale voltage changes the SNR. It cancels, because the signal and the quantisation step both scale with $V_{F S}$ . Some students also drop the $+ 1.76$ dB term, or use $10 lo g_{10}$ where $20 lo g_{10}$ belongs.

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