GATE CSE 2018 question paper with solutions
All 65 questions of the GATE 2018 Computer Science and Information Technology paper, in order, with the official answer key from IIT Guwahati. 18 have a full solution.
- questions · 100 marks
- 65questions · 100 marks
- with a full solution
- 18with a full solution
- question types
- 41 MCQ · 24 NATquestion types
GATE CSE 2018 answer key
| Question | Type | Marks | Answer |
|---|---|---|---|
| GA Q.1 | MCQ | 1 | B |
| GA Q.2 | MCQ | 1 | A |
| GA Q.3 | MCQ | 1 | D |
| GA Q.4 | MCQ | 1 | C |
| GA Q.5 | MCQ | 1 | B |
| GA Q.6 | MCQ | 2 | B |
| GA Q.7 | MCQ | 2 | C |
| GA Q.8 | MCQ | 2 | B |
| GA Q.9 | MCQ | 2 | A |
| GA Q.10 | MCQ | 2 | C |
| Q.1 | MCQ | 1 | D |
| Q.2 | MCQ | 1 | A |
| Q.3 | MCQ | 1 | B |
| Q.4 | MCQ | 1 | D |
| Q.5 | MCQ | 1 | D |
| Q.6 | MCQ | 1 | D |
| Q.7 | MCQ | 1 | B |
| Q.8 | MCQ | 1 | B |
| Q.9 | MCQ | 1 | A |
| Q.10 | MCQ | 1 | B |
| Q.11 | MCQ | 1 | A |
| Q.12 | MCQ | 1 | D |
| Q.13 | MCQ | 1 | C |
| Q.14 | MCQ | 1 | C |
| Q.15 | NAT | 1 | 0.021 to 0.024 |
| Q.16 | NAT | 1 | 0.27 to 0.30 |
| Q.17 | NAT | 1 | 3 |
| Q.18 | NAT | 1 | 3 |
| Q.19 | NAT | 1 | 42 |
| Q.20 | NAT | 1 | 4 |
| Q.21 | NAT | 1 | 4 |
| Q.22 | NAT | 1 | 2 |
| Q.23 | NAT | 1 | 59.0 to 60.0 |
| Q.24 | NAT | 1 | 2 |
| Q.25 | NAT | 1 | 34 to 35 |
| Q.26 | MCQ | 2 | D |
| Q.27 | MCQ | 2 | D |
| Q.28 | MCQ | 2 | A |
| Q.29 | MCQ | 2 | A |
| Q.30 | MCQ | 2 | A |
| Q.31 | MCQ | 2 | C |
| Q.32 | MCQ | 2 | B |
| Q.33 | MCQ | 2 | C |
| Q.34 | MCQ | 2 | B |
| Q.35 | MCQ | 2 | B |
| Q.36 | MCQ | 2 | D |
| Q.37 | MCQ | 2 | D |
| Q.38 | MCQ | 2 | A |
| Q.39 | MCQ | 2 | A |
| Q.40 | MCQ | 2 | C |
| Q.41 | MCQ | 2 | C |
| Q.42 | MCQ | 2 | B |
| Q.43 | NAT | 2 | 109 |
| Q.44 | NAT | 2 | 0.60 to 0.62 |
| Q.45 | NAT | 2 | 10230 |
| Q.46 | NAT | 2 | 80 |
| Q.47 | NAT | 2 | 4 |
| Q.48 | NAT | 2 | 16 |
| Q.49 | NAT | 2 | 3 |
| Q.50 | NAT | 2 | 219 |
| Q.51 | NAT | 2 | 32 |
| Q.52 | NAT | 2 | 2 |
| Q.53 | NAT | 2 | 85 |
| Q.54 | NAT | 2 | 144 |
| Q.55 | NAT | 2 | 50 |
General Aptitude GA Q.1 to Q.10
- GA Q.1MCQ · 1 markOfficial answer: B
- GA Q.2MCQ · 1 markOfficial answer: A
- GA Q.3MCQ · 1 markOfficial answer: D
- GA Q.4MCQ · 1 markOfficial answer: C
- GA Q.5MCQ · 1 markOfficial answer: B
- GA Q.6MCQ · 2 marksOfficial answer: B
- GA Q.7MCQ · 2 marksOfficial answer: C
- GA Q.8MCQ · 2 marksOfficial answer: B
- GA Q.9MCQ · 2 marksOfficial answer: A
- GA Q.10MCQ · 2 marksOfficial answer: C
Computer Science and Information Technology Q.1 to Q.55
- Q.1MCQ · 1 markOfficial answer: D
- Q.2MCQ · 1 markOfficial answer: A
Programming in C › Pointers & arrays
A struct of same-sized char members has no padding, so byte offsets equal member order; casting a struct pointer to char* and indexing lets you read individual member bytes directly, and %c prints only the raw character, never quote marks.
WATCH OUT FORFull solutionAssuming (char*)q+2 lands on garbage/padding, or forgetting that 'a'+2 is evaluated as an int arithmetic expression at initialization time (giving the char 'c') rather than being stored literally as "a+2"; also mistakenly believing %c would print the quotes shown in the option text.
- Q.3MCQ · 1 markOfficial answer: B
Data Structures and Algorithms › Linear structures
In a singly linked list only forward (next) pointers exist. Inserting at the head is always O(1). Deleting at the tail needs the new tail (the second-to-last node), and the only way to find it is to traverse from head, which is O(n); a tail pointer alone cannot fix this since it gives no backward link.
WATCH OUT FORFull solutionAssuming a separate tail pointer makes dequeue O(1) too, forgetting that in a singly linked list the tail node has no back-pointer, so finding its predecessor still needs an O(n) scan from head.
- Q.4MCQ · 1 markOfficial answer: D
- Q.5MCQ · 1 markOfficial answer: D
Computer Organization and Architecture › Instructions & addressing
RISC (Reduced Instruction Set Computer) design philosophy is built around making the common case fast and simple for pipelining: it uses a load-store (register-to-register) architecture where only explicit LOAD/STORE instructions touch memory and all arithmetic/logic operations work only on registers; it uses fixed-length, uniform instruction formats so fetch and decode can be done in a single, predictable cycle without variable-length parsing; and because the instruction set is small and regular, the control unit can be hardwired (built directly in logic gates) rather than needing microcode, giving faster instruction execution. All three listed characteristics — register-to-register arithmetic only, fixed-length instructions, and a hardwired control unit — are therefore genuine, standard hallmarks of RISC design.
WATCH OUT FORFull solutionConfusing this with CISC characteristics: assuming a hardwired control unit is unusual or that RISC uses microcode (it is CISC that typically needs microcoded control for its large, variable, complex instruction set), or assuming RISC allows memory operands directly in arithmetic instructions (RISC restricts memory access to explicit load/store instructions only). Either mistake would lead to eliminating statement III or I and picking (A) or (B) instead of (D).
- Q.6MCQ · 1 markOfficial answer: D
- Q.7MCQ · 1 markOfficial answer: B
- Q.8MCQ · 1 markOfficial answer: B
- Q.9MCQ · 1 markOfficial answer: A
Computer Organization and Architecture › I/O, interrupts & DMA
Interrupt handling sequence: an interrupt is only recognized at an instruction boundary, so the processor completes the current instruction (Q) first; it then saves the interrupted process's context (P) before it can safely redirect control, loads the ISR's start address into the PC (T), runs the ISR (R), and finally restores the saved context (S) to resume the interrupted process. Save-before-jump is the essential ordering constraint.
WATCH OUT FORFull solutionPlacing "loads new PC" (T) before "pushes process status" (P), reasoning that the jump happens first — but the processor must save the interrupted context onto the stack before it can safely redirect the PC to the ISR, otherwise the return address/status would be lost.
- Q.10MCQ · 1 markOfficial answer: B
- Q.11MCQ · 1 markOfficial answer: A
- Q.12MCQ · 1 markOfficial answer: D
- Q.13MCQ · 1 markOfficial answer: C
- Q.14MCQ · 1 markOfficial answer: C
- Q.15NAT · 1 markOfficial answer: 0.021 to 0.024
- Q.16NAT · 1 markOfficial answer: 0.27 to 0.30
- Q.17NAT · 1 markOfficial answer: 3
- Q.18NAT · 1 markOfficial answer: 3
- Q.19NAT · 1 markOfficial answer: 42
- Q.20NAT · 1 markOfficial answer: 4
Data Structures and Algorithms › Trees & heaps
Reconstruct the binary tree from postorder and inorder traversals recursively: the last element of a postorder segment is the subtree's root; its position in the corresponding inorder segment splits the remaining nodes into left and right subtrees, and the sizes of these splits also split the postorder segment (left-subtree postorder is the first |left| elements, right-subtree postorder is the last |right| elements). Recursing down the always-larger left branch reveals the tree's shape without drawing every node's siblings.
WATCH OUT FORFull solutionConfusing "height" (edge count of the longest root-to-leaf path, as this question explicitly defines it) with "number of levels" or "number of nodes on the longest path" (which would give 5 instead of 4); also, when splitting the postorder sequence by subtree size, using the wrong slice boundaries (e.g., taking the left postorder segment from the end instead of the start) can silently misassign which node is which subtree's root.
- Q.21NAT · 1 markOfficial answer: 4
A global variable incremented once per function call counts the number of times that function executes; here
calcrecurses onb/3untilb==3, so the count equals the number of times 81 can be divided by 3 to reach 3, i.e. , giving 4 calls.WATCH OUT FORFull solutionConfusing the returned value of
calc(a large cubed-and-recubed number,64cubed three times over) with what is actually printed; the program never prints the return value ofcalc, only the unrelated call-countcounter, so trying to compute(((64)^3)^3)^3is wasted effort and not the answer being asked for. - Q.22NAT · 1 markOfficial answer: 2
- Q.23NAT · 1 markOfficial answer: 59.0 to 60.0
Computer Organization and Architecture › Memory & cache
All chips in a memory bank that together form the data-bus width are driven by the same address lines and are refreshed in parallel, so the number of refresh operations equals the number of rows in ONE chip, not (rows × number of chips). Refresh time competes with read/write time inside a fixed refresh period, so the fraction of the period left for read/write is .
WATCH OUT FORFull solutionMultiplying the row count by the number of chips (treating each chip as needing its own separate refresh pass), which gives refresh operations instead of , and lands on an answer far below the key.
- Q.24NAT · 1 markOfficial answer: 2
- Q.25NAT · 1 markOfficial answer: 34 to 35
- Q.26MCQ · 2 marksOfficial answer: D
- Q.27MCQ · 2 marksOfficial answer: D
- Q.28MCQ · 2 marksOfficial answer: A
- Q.29MCQ · 2 marksOfficial answer: A
Programming in C › Functions & scope
fun1 takes pointers by value, so swapping its local pointer copies does not affect main's variables; fun2 takes pointer-to-pointer, so *s1/*s2 alias str1/str2 and the swap is real.
WATCH OUT FORFull solutionThinking fun1 also swaps str1/str2 in main because its parameters are pointers — confusing "pointer parameter" with "reference parameter". Only fun2 (char **) can modify the caller's pointer variables.
- Q.30MCQ · 2 marksOfficial answer: A
Data Structures and Algorithms › Graph algorithms
In an undirected graph, DFS never produces cross edges (only tree edges and back edges), so Statement I always holds; but BFS trees can have non-tree edges joining two vertices at the same level (e.g. any odd cycle such as a triangle), so Statement II can fail.
WATCH OUT FORFull solutionAssuming BFS tree edges are the only edges of G and forgetting that non-tree ("cross") edges of an undirected graph can join two vertices at the same BFS depth — exactly what breaks Statement II.
- Q.31MCQ · 2 marksOfficial answer: C
Data Structures and Algorithms › Design techniques
Run the standard matrix-chain-multiplication DP to find the optimal parenthesization, then read off only those adjacent pairs of ORIGINAL matrices that end up being multiplied directly against each other (not a pair where one side is already a computed sub-product) — that is the precise meaning of "explicitly computed pair" given in the stem's own example.
WATCH OUT FORFull solutionConfusing "explicitly computed pair" with any two matrices that appear next to each other in the optimal split, instead of tracing the actual multiplication order and keeping only steps where BOTH operands are original (un-combined) matrices. Here F1, F2 and F5 are each eventually multiplied against an already-computed product, not against another lone original matrix, so despite being "adjacent" in the chain, F1F2 and F4F5 are never explicitly computed pairs.
- Q.32MCQ · 2 marksOfficial answer: B
Trace the two loops separately: the first loop counts how many times can be halved (integer division) before reaching 1, i.e. ; the second loop then counts how many times itself can be halved before reaching , i.e. . So the code computes .
WATCH OUT FORFull solutionConfusing the count in the first loop: some solvers miscount the number of halvings needed to go from 2^40 down to ≤1, off by one, giving j = 39 or 41 instead of 40; others then also miscount the number of halvings of j in the second loop.
- Q.33MCQ · 2 marksOfficial answer: C
- Q.34MCQ · 2 marksOfficial answer: B
Computer Organization and Architecture › Memory & cache
Split the physical address into tag | set-index | block-offset. Compute block-offset bits from block size (word count × word size), compute index bits from (cache blocks / K), and the tag gets whatever bits remain — note that in the final simplification the offset bits (M+W) cancel out exactly against the subtraction in the index-bit term, which is why the answer surprisingly doesn't depend on M or W.
WATCH OUT FORFull solutionForgetting that the block-offset subtraction and the (M+W) term embedded in the index-bit count cancel algebraically, so students either leave stray M, W terms in the final tag expression (wrongly picking C or D) or forget the log₂K adjustment entirely (picking A).
- Q.35MCQ · 2 marksOfficial answer: B
- Q.36MCQ · 2 marksOfficial answer: D
- Q.37MCQ · 2 marksOfficial answer: D
- Q.38MCQ · 2 marksOfficial answer: A
- Q.39MCQ · 2 marksOfficial answer: A
- Q.40MCQ · 2 marksOfficial answer: C
- Q.41MCQ · 2 marksOfficial answer: C
- Q.42MCQ · 2 marksOfficial answer: B
- Q.43NAT · 2 marksOfficial answer: 109
- Q.44NAT · 2 marksOfficial answer: 0.60 to 0.62
- Q.45NAT · 2 marksOfficial answer: 10230
Count the prints in one round of halving and multiply by the number of rounds: every value of y from 1024 down to 2 runs one full halving of x from 1024 to 1, and y = 1 ends the recursion.
WATCH OUT FORFull solutionCounting 1024 rounds instead of 1023 (the call with y = 1 prints nothing), or 11 prints per round instead of 10 (there is no print once x = 1). Either slip gives 10240 or 11253 instead of 10230.
- Q.46NAT · 2 marksOfficial answer: 80
Data Structures and Algorithms › Trees & heaps
A heap on n distinct keys is stored in the unique shape of a complete binary tree; the number of distinct heap arrangements equals n! divided by the product of the sizes of every subtree (Knuth's formula), because each subtree's elements can be permuted internally in "subtree-size!" ways relative to the constraint that only the minimum of each subtree must sit at that subtree's root.
WATCH OUT FORFull solutionTreating the two children of a 3-node subtree as distinguishable in a way that forces extra constraints (e.g., assuming a fixed left<right order), which wrongly gives 1 arrangement per 3-node subtree instead of 2, or forgetting to multiply by the C(6,3) way of splitting the remaining 6 keys between the two subtrees.
- Q.47NAT · 2 marksOfficial answer: 4
Data Structures and Algorithms › Graph algorithms
When several edges tie for the same weight at the point a Kruskal-style MST construction needs to add a new vertex, each independent tie multiplies the MST count; here vertex L and vertex R each have exactly two incident edges, so the MST count can be at most 2×2=4, achieved only when both pairs tie simultaneously (which requires x=5, since L's tie is fixed at weight 4 and R's tie needs x to equal B–R's weight of 5).
WATCH OUT FORFull solutionTreating only one of the two low-degree vertices (L or R) as capable of creating a tie and stopping after finding the L-tie gives 2 MSTs, missing that R independently ties at x=5 too, so the two 2-way ties multiply to 4 rather than just staying at 2; another common slip is forgetting that A–B, despite also being weight 4, cannot be used to attach L because both of its endpoints are already connected once T–A and T–B are chosen, so it must be excluded from the tie count.
- Q.48NAT · 2 marksOfficial answer: 16
Data Structures and Algorithms › Design techniques
Compute by sorting items on value-to-weight ratio and greedily adding any item (in ratio order) that still fits in the remaining capacity, skipping only the ones that don't; separately compute by exhaustively checking every subset with total weight Kg, since is small enough for brute force. The gap is the classic illustration that the greedy ratio heuristic is not optimal for 0/1 knapsack.
WATCH OUT FORFull solutionStopping the greedy pass as soon as one item fails to fit (instead of continuing to check the remaining, lower-ratio items against the leftover capacity), or restricting the "optimal" search to combinations that happen to look greedy-adjacent instead of checking all subsets — both shortcuts miss that the single item {1} (weight 10, value 60) alone beats every combination the greedy method can reach.
- Q.49NAT · 2 marksOfficial answer: 3
- Q.50NAT · 2 marksOfficial answer: 219
Computer Organization and Architecture › Pipelining
When one pipeline stage (here PO) has a variable, instruction-dependent duration while every other stage is fixed at 1 cycle, that stage becomes the sole structural bottleneck (no data/control hazards are present). The total completion time is: (cycles for the first instruction to reach the bottleneck stage) + (sum of the bottleneck stage's occupancy over all instructions, since it is never idle once started) + (cycles for the last instruction to drain through the stages after the bottleneck).
WATCH OUT FORFull solutionTreating this like an ordinary 5-stage pipeline and using the naive formula (number of instructions + stages − 1) with some "average" PO time, or forgetting that once PO starts working it stays continuously busy (no idle gaps) so its total busy time is simply the sum of all 100 instructions' individual PO durations — not multiplied by a cycle count or averaged. Another common error is forgetting to add the 1-cycle WB drain after the last instruction leaves PO, or forgetting the 3-cycle fill (IF+ID+OF) before the first instruction enters PO.
- Q.51NAT · 2 marksOfficial answer: 32
Computer Organization and Architecture › Instructions & addressing
Total instruction space is 2^16 (2-byte format). Each instruction type reserves a block of this space sized by (number of instructions of that type) × 2^(bits needed to encode its register operands). After subtracting the space used by Type-1, Type-2, and Type-3, the leftover encodings are divided among Type-4 instructions, each of which only needs to encode one 6-bit floating-point register operand.
WATCH OUT FORFull solutionForgetting to subtract the opcode/space already consumed by Type-1, Type-2, and Type-3 instructions before computing how many encodings remain for Type-4 (i.e., treating the full 2^16 space as available for Type-4 alone), or forgetting to divide the remaining encodings by 2^6 (the register-field width) rather than by some other count.
- Q.52NAT · 2 marksOfficial answer: 2
- Q.53NAT · 2 marksOfficial answer: 85
- Q.54NAT · 2 marksOfficial answer: 144
- Q.55NAT · 2 marksOfficial answer: 50