IAE Academy

GATE 2023 EE Q.56: solution and answer

GATE 2023 · EEQ.56 · 2 marks · NAT

Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence [ABCD] of initial logic states, which will not change with clock, is ________.

GATE 2023 EE question 56: Two D flip-flops, FF1 (left) and FF2 (right), both driven by a common CLK line.Tap to open full size
Figure from the GATE 2023 EE paper. It is part of the question.
Figure description

Two D flip-flops, FF1 (left) and FF2 (right), both driven by a common CLK line. FF1 has its D input pin drawn on its right side and its Q output on its lower-left side. FF2 has its Q output on its left side and its D input on its right side. Node A (top-left terminal) is tied by a wire running down to FF1's Q output, so A = Q_1. A drives both inputs of a two-input NOR gate (both inputs shorted together, so the NOR acts as an inverter); the NOR output is node B. B and node C are the two inputs of a two-input X-OR gate whose output is node D (top-right terminal). Node D is wired down to the D input of FF2. FF2's Q output is wired left to the D input of FF1, and a junction on that wire goes up to node C, so C = Q_2 = D_1. So: A = Q_1, B = A (NOR of A with A), C = Q_2, D = B C, D_1 = Q_2, D_2 = D.

Answer and solution

ANSWER

The only state the clock leaves unchanged is . In that state , which is in decimal.

Official answer: 8Source: Official answer key, GATE 2023 EE (IIT Kanpur)

  1. Read the nodes off the figure (complement written with ). Call the flip-flop outputs (left flip-flop) and (right flip-flop). Node A is wired to the left flip-flop's output, so . Both inputs of the NOR gate are tied to A, so it works as an inverter: . Node C is on the wire from the right flip-flop's output, so . The X-OR output is node D, so .

  2. Next-state equations: a D flip-flop copies its D input on the clock edge (). The left flip-flop's D input is wired to , and the right flip-flop's D input is wired to node D. So

  3. A state that does not change with the clock must satisfy and . That gives and .

  4. Substitute into the second condition: , so and therefore . The only fixed state is .

  5. Check with the state table (): , while is a 3-state cycle. So is the only state that stays the same.

  6. Node values in that state: , , , .

  7. .

KEY IDEA

A state that does not change with the clock is a fixed point of the next-state equations: for every D flip-flop, must equal the present . Write the D inputs in terms of , solve and , then work out the node values A, B, C, D from that state.

WATCH OUT FOR

Reading A as instead of (A is wired to the output). That changes the equations to , which gives the fixed state and the wrong answer . Two other traps: answering with the flip-flop state (giving 0) when the question asks for the four node values [ABCD], and forgetting that a NOR with both inputs tied together is just an inverter, so .

From the GATE 2023 EE paper. Every question of this paper · Download the full paper · All 30 Sequential questions, with notes

More Sequential questions