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GATE 2024 IN Q.23: solution and answer

GATE 2024 · INQ.23 · 1 mark · NAT

Consider the circuit shown in the figure.

[Figure]

The CMOS digital logic circuit has infinite input impedance. Assume the opamp is ideal. A 1.8 V Zener diode with a minimum Zener current of 2 mA is used. The corresponding maximum value of resistance is ________ k. (rounded off to one decimal place).

GATE 2024 IN question 23: An op-amp used open-loop as a comparator.Tap to open full size
Figure from the GATE 2024 IN paper. It is part of the question.
Figure description

An op-amp used open-loop as a comparator. Input V_in goes to the non-inverting (+) input and V_REF to the inverting (−) input. The op-amp supply rails are +5 V (top) and −5 V (bottom). The op-amp output feeds one end of a series resistor R_Z. The other end of R_Z is the node labelled V_out. From V_out a Zener diode goes to ground, cathode at V_out and anode at ground, so it is reverse-biased when V_out is positive. V_out also drives the input of a block labelled 'CMOS Digital Logic', which is powered from 1.8 V at the top and grounded at the bottom.

Answer and solution

ANSWER

The maximum value of is .

Official answer: 1.6Source: Official answer key, GATE 2024 IN (IISc Bengaluru)

  1. What the op-amp does. There is no feedback, so the ideal op-amp works as a comparator. Its output goes to one supply rail or the other: when , and when . An ideal op-amp saturates exactly at its rails, so .

  2. Which state sets the limit. The Zener cathode is at and its anode is at ground. When the output is high (), the Zener is reverse-biased and in breakdown it holds , the logic-high level the 1.8 V CMOS gate needs. This is the only state where the Zener has to regulate. When the output is , the Zener is forward-biased and clamps near , so the breakdown current condition does not apply there.

  3. KCL at the node. The CMOS input impedance is infinite, so the logic gate draws no current. All the current in therefore flows into the Zener: .

  4. Ohm's law across (output high, Zener in breakdown):

  5. Keep the Zener in breakdown. falls as rises, so the condition puts an upper limit on :

  6. Result. . With any larger resistance the Zener current drops below , and is no longer held at .

KEY IDEA

The open-loop op-amp is a comparator, so its high output is the rail. The CMOS input draws no current, so all of goes into the Zener. Setting this current to at least gives an upper limit on .

WATCH OUT FOR

Using the Zener voltage alone, , when the drop across is actually . A second slip is to treat the state as the limiting case, or to subtract load current into the CMOS gate, which draws none.

From the GATE 2024 IN paper. Every question of this paper · Download the full paper · All 25 Diode circuits questions, with notes

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