GATE 2025 EE Q.19: solution and answer

Official answer: BSource: Official answer key, GATE 2025 EE (IIT Roorkee)

1. Nullator constraint (from the definition): $v_N=0$ and $i_N=0$ at the same time.

2. Series connection (KCL at the internal node): the same current $i$ flows through both elements, so $i=i_N=0$, and therefore $i_R=0$.

3. Ohm's law on the resistor: $v_R=R{i}_R=R\times 0=0$.

4. KVL around the series branch: the terminal voltage is $v=v_N+v_R=0+0=0$.

5. So the two-terminal combination has $v=0$ and $i=0$ together. That is exactly the definition of a nullator.

6. It is not an open circuit, which only forces $i=0$ and leaves the voltage free. It is not a short circuit, which only forces $v=0$ and leaves the current free. It is not a resistor of value $R$, because $v=Ri$ would allow any non-zero pair. Here both $v$ and $i$ are fixed at zero, so the answer is (B).