GATE EC · EE · IN

Active filters and waveform circuits

Active filters, comparators, Schmitt triggers, timers, VCOs and PLLs

This topic covers the op-amp circuits that shape a signal's spectrum or turn it into switching and timing signals: first- and second-order active filters (Sallen-Key, Butterworth, band-pass, notch and all-pass), comparators and Schmitt triggers, op-amp and 555 multivibrators, square/triangle generators, VCOs and the phase-locked loop. Solving a question here comes down to reading the circuit correctly (which terminal gets the input and which gets the feedback), writing one node equation or threshold condition, and applying the matching standard result within its conditions.

13 previous-year questions · 12 solved · 5 practice questions

Conventions and first-order active filters

Conventions used throughout. Every op-amp is ideal unless a value is given: infinite open-loop gain, infinite input resistance (no current into either input), zero output resistance and unlimited bandwidth. In a filter the circuit has net negative feedback (a Sallen-Key filter also has a positive-feedback path through a capacitor, but it is stable for the gains given below), so the op-amp works in its linear region and $v_{+} = v_{-}$ (virtual short). In a comparator, Schmitt trigger or multivibrator it runs open loop or with positive feedback, so in general $v_{+} \neq = v_{-}$ and the output sits at a rail: $v_{o} = + V_{s a t}$ when $v_{+} > v_{-}$ and $v_{o} = - V_{s a t}$ when $v_{+} < v_{-}$ . Saturation levels are symmetric, $\pm V_{s a t}$ , unless stated. Diodes use the constant-drop model ( $V_{D} \approx 0.7$ V when conducting) unless a diode is called ideal. $ω$ is in rad/s and $f = ω /2 π$ in Hz. A filter's cut-off frequency means the frequency at which its gain is 3 dB below the passband gain, unless stated.

Why active filters. A passive RC section is loaded by whatever follows it and cannot have gain. Building the RC network around an op-amp gives a passband gain set by resistors; the op-amp's input draws no current, so it does not load the RC network, and its near-zero output resistance means the next stage cannot load the filter. Sections can therefore be cascaded without interacting: the overall transfer function is simply the product of the stage transfer functions. (The source still sees the filter's own input impedance: for the non-inverting first-order low-pass below, that is $R + 1/ (s C)$ .) No inductors are needed, even for second-order responses. The order of a filter is the degree of its denominator in $s$ ; a low-pass or high-pass of order n has an asymptotic roll-off of $20 n$ dB/decade (about $6 n$ dB/octave).

FIRST-ORDER LOW-PASS, NON-INVERTING

H (s) = \frac{V _{o}}{V _{i}} = \frac{A _{0}}{1 + s R C}, A_{0} = 1 + \frac{R _{f}}{R _{1}}, f_{c} = \frac{1}{2 π R C}

R in series from the input to the + terminal, C from the + terminal to ground; $R_{1}$ (− terminal to ground) and $R_{f}$ (output to − terminal) set the passband gain and do not affect $f_{c}$ . $∣ H (j f) ∣ = A_{0} / 1 + (f / f_{c})^{2}$ and $∠ H = - tan^{- 1} (f / f_{c})$ . With $R_{f} = 0$ (voltage follower), $A_{0} = 1$ .

FIRST-ORDER HIGH-PASS, NON-INVERTING

H (s) = \frac{A _{0} s R C}{1 + s R C}, f_{c} = \frac{1}{2 π R C}

R and C swap places: C in series to the + terminal, R from the + terminal to ground. $∣ H (j f) ∣ = A_{0} (f / f_{c}) / 1 + (f / f_{c})^{2}$ , phase $9 0^{\circ} - tan^{- 1} (f / f_{c})$ . A real op-amp's finite gain-bandwidth product eventually turns every active high-pass into a band-pass; the ideal model ignores this.

FIRST-ORDER LOW-PASS, INVERTING

H (s) = - \frac{R _{f}}{R _{1}} \cdot \frac{1}{1 + s R _{f} C _{f}}, f_{c} = \frac{1}{2 π R _{f} C _{f}}

$R_{1}$ from the input to the − terminal, $C_{f}$ in parallel with $R_{f}$ in the feedback path, + terminal grounded. Only the feedback pair sets $f_{c}$ . The passband phase is $18 0^{\circ}$ , so the total phase is $18 0^{\circ} - tan^{- 1} (f / f_{c})$ .

FIRST-ORDER HIGH-PASS, INVERTING

H (s) = - \frac{R _{f}}{R _{1}} \cdot \frac{s R _{1} C _{1}}{1 + s R _{1} C _{1}}, f_{c} = \frac{1}{2 π R _{1} C _{1}}

$R_{1}$ and $C_{1}$ in series from the input to the − terminal, $R_{f}$ alone in the feedback path. Only the input pair sets $f_{c}$ ; the high-frequency gain is $- R_{f} / R_{1}$ .

First-order low-pass response, relative to the passband gain

$f$	$∣ H ∣/ A_{0}$	Gain relative to passband	Phase (non-inverting low-pass)
$0.1 f_{c}$	0.995	−0.04 dB	$- 5. 7^{\circ}$
$f_{c}$	0.707	−3.01 dB	$- 4 5^{\circ}$
$2 f_{c}$	0.447	−6.99 dB	$- 63. 4^{\circ}$
$10 f_{c}$	0.0995	−20.04 dB	$- 84. 3^{\circ}$

EXAM TIP

In the inverting forms the cut-off comes from the RC pair that sits together: the feedback pair ( $R_{f} C_{f}$ ) for the low-pass, the input pair ( $R_{1} C_{1}$ ) for the high-pass. Using $R_{1} C_{f}$ or $R_{f} C_{1}$ is a common slip. In the non-inverting forms the gain resistors never affect $f_{c}$ .

Second-order filters: standard forms, Sallen-Key and Butterworth

Every standard second-order section has a denominator of the same form, $s^{2} + (ω_{0} / Q) s + ω_{0}^{2}$ ; only the numerator changes with the filter type. $ω_{0}$ is the natural (pole) frequency and $Q$ the quality factor; in control-systems language the damping ratio is $ζ = 1/ (2 Q)$ . $Q$ fixes the shape near $ω_{0}$ : a low $Q$ gives a gentle knee, a high $Q$ a resonant peak. The poles are complex only for $Q > 1/2$ , and the low-pass magnitude peaks only for $Q > 1/ 2$ .

STANDARD SECOND-ORDER FORMS

H_{L P} (s) H_{B P} (s) = \frac{K ω _{0}^{2}}{s ^{2} + \frac{ω _{0}}{Q} s + ω _{0}^{2}}, H_{H P} (s) = \frac{K s ^{2}}{s ^{2} + \frac{ω _{0}}{Q} s + ω _{0}^{2}} = \frac{K \frac{ω _{0}}{Q} s}{s ^{2} + \frac{ω _{0}}{Q} s + ω _{0}^{2}}, H_{N} (s) = \frac{K ( s ^{2} + ω _{0}^{2} )}{s ^{2} + \frac{ω _{0}}{Q} s + ω _{0}^{2}}

K is the passband gain: at DC for the low-pass, at high frequency for the high-pass, at $ω_{0}$ for the band-pass, and in both outer bands for the notch. $ζ = 1/ (2 Q)$ . At $ω = ω_{0}$ : $∣ H_{L P} ∣ = ∣ H_{H P} ∣ = K Q$ , $∣ H_{B P} ∣ = K$ and $H_{N} = 0$ .

Type	Numerator	$∣ H ∣$ at $ω \to 0$	$∣ H ∣$ at $ω_{0}$	$∣ H ∣$ at $ω \to \infty$
Low-pass	$K ω_{0}^{2}$	$K$	$K Q$	0
High-pass	$K s^{2}$	0	$K Q$	$K$
Band-pass	$K (ω_{0} / Q) s$	0	$K$	0
Notch	$K (s^{2} + ω_{0}^{2})$	$K$	0	$K$

PEAKING OF A SECOND-ORDER LOW-PASS

∣ H_{L P} ∣_{ma x} = \frac{K Q}{1 - \frac{1}{4 Q ^{2}}} at ω_{p} = ω_{0} 1 - \frac{1}{2 Q ^{2}}, Q > \frac{1}{2}

For $Q \leq 1/ 2$ the low-pass magnitude falls monotonically from K and has no peak. A high-pass with the same Q has the same peak value, at $ω_{0} / 1 - 1/ (2 Q^{2})$ .

−3 DB FREQUENCY OF A SECOND-ORDER LOW-PASS

ω_{c} = ω_{0} a + a^{2} + 1, a = 1 - \frac{1}{2 Q ^{2}}

The frequency where $∣ H_{L P} ∣ = K / 2$ , i.e. 3 dB below the DC gain K. It equals $ω_{0}$ only when $Q = 1/ 2$ (Butterworth): $Q = 0.5$ (for example a unity-gain Sallen-Key with equal R and equal C) gives $ω_{c} = 0.644 ω_{0}$ , and $Q = 1$ gives $1.272 ω_{0}$ . For a high-pass with the same Q, $ω_{c} = ω_{0} / a + a^{2} + 1$ . Do not take $1/ R C$ as the cut-off of a second-order filter unless its Q is $1/ 2$ .

Sallen-Key low-pass. Two resistors $R_{1}$ and $R_{2}$ run in series from the input to the + terminal. Capacitor $C_{1}$ goes from the junction of $R_{1}$ and $R_{2}$ to the op-amp output (the positive-feedback path) and $C_{2}$ goes from the + terminal to ground. The op-amp is a non-inverting amplifier of gain $K = 1 + R_{f} / R_{a}$ ( $R_{a}$ from the − terminal to ground, $R_{f}$ from the output to the − terminal); $K = 1$ is a voltage follower. Nodal analysis at the junction and at the + terminal gives the result below.

SALLEN-KEY LOW-PASS (GENERAL)

H (s) = \frac{K}{s ^{2} R _{1} R _{2} C _{1} C _{2} + s [ ( R _{1} + R _{2} ) C _{2} + R _{1} C _{1} ( 1 - K ) ] + 1}, ω_{0} = \frac{1}{R _{1} R _{2} C _{1} C _{2}}

$C_{1}$ is the capacitor to the output, $C_{2}$ the capacitor to ground; DC gain K. Dividing through by $R_{1} R_{2} C_{1} C_{2}$ gives $Q = R_{1} R_{2} C_{1} C_{2} / [(R_{1} + R_{2}) C_{2} + R_{1} C_{1} (1 - K)]$ .

UNITY-GAIN SALLEN-KEY LOW-PASS (K = 1)

Q = \frac{R _{1} R _{2} C _{1} C _{2}}{( R _{1} + R _{2} ) C _{2}}; R_{1} = R_{2} \Rightarrow Q = \frac{1}{2} \frac{C _{1}}{C _{2}}

With equal resistors, Q is set by the capacitor ratio alone: Butterworth ( $Q = 1/ 2$ ) needs $C_{1} = 2 C_{2}$ , the feedback capacitor twice the grounded one. Equal R and equal C at unity gain give only $Q = 0.5$ .

EQUAL-COMPONENT SALLEN-KEY (LOW-PASS OR HIGH-PASS)

R_{1} = R_{2} = R, C_{1} = C_{2} = C : ω_{0} = \frac{1}{R C}, Q = \frac{1}{3 - K}, K = 1 + \frac{R _{f}}{R _{a}}

Holds for both the low-pass and the high-pass Sallen-Key; the gain alone sets Q. Stable only for $K < 3$ : at $K = 3$ the poles reach the $j ω$ axis and the circuit oscillates at $ω_{0}$ , and for $K > 3$ they are in the right half-plane. Butterworth: $K = 3 - 2 = 1.586$ , i.e. $R_{f} = 0.586 R_{a}$ . At $ω = ω_{0}$ the gain is $K Q = K / (3 - K)$ .

Sallen-Key high-pass. Swap every resistor with a capacitor: $C_{1}$ and $C_{2}$ in series from the input to the + terminal, $R_{1}$ from their junction to the output, $R_{2}$ from the + terminal to ground. The amplifier is the same.

SALLEN-KEY HIGH-PASS (GENERAL)

H (s) = \frac{K s ^{2} R _{1} R _{2} C _{1} C _{2}}{s ^{2} R _{1} R _{2} C _{1} C _{2} + s [ R _{1} ( C _{1} + C _{2} ) + R _{2} C _{2} ( 1 - K ) ] + 1}, ω_{0} = \frac{1}{R _{1} R _{2} C _{1} C _{2}}

$R_{1}$ is the resistor to the output, $R_{2}$ the resistor to ground, $C_{1}$ the input capacitor; high-frequency gain K. At unity gain with $C_{1} = C_{2}$ : $Q = \frac{1}{2} R_{2} / R_{1}$ , so Butterworth needs $R_{2} = 2 R_{1}$ .

BUTTERWORTH MAGNITUDE RESPONSE

∣ H (j ω) ∣ = \frac{K}{1 + ( \frac{ω}{ω _{c}} ) ^{2 n}}

Low-pass of order n (for a high-pass, replace $ω / ω_{c}$ by $ω_{c} / ω$ ). Maximally flat at $ω = 0$ (the first $2 n - 1$ derivatives of $∣ H ∣^{2}$ vanish there), no ripple, exactly −3 dB at $ω_{c}$ for every n, asymptotic roll-off $20 n$ dB/decade, and phase $- n \times 4 5^{\circ}$ at $ω_{c}$ . The poles lie equally spaced on a circle of radius $ω_{c}$ in the left half-plane. Other standard approximations make different trade-offs: Chebyshev accepts ripple in the passband for a sharper transition at the same order, and Bessel accepts a gentler transition for a nearly constant group delay; all three roll off at $20 n$ dB/decade asymptotically.

BUTTERWORTH ORDER REQUIRED

n \geq \frac{lo g _{10} ( \frac{1 0 ^{0.1 A_{s}} - 1}{1 0 ^{0.1 A_{p}} - 1} )}{2 lo g _{10} ( \frac{ω _{s}}{ω _{p}} )}

$A_{p}$ = the largest attenuation (dB) allowed at the passband edge $ω_{p}$ ; $A_{s}$ = the least attenuation (dB) required at the stopband edge $ω_{s}$ (low-pass: $ω_{s} > ω_{p}$ ; high-pass: use $ω_{p} / ω_{s}$ ). Round n UP to an integer. If $ω_{p}$ is the −3 dB cut-off, $1 0^{0.1 A_{p}} - 1 \approx 1$ . Example: at least 40 dB at $2 ω_{c}$ needs $n \geq lo g_{10} (9999) / (2 lo g_{10} 2) = 6.64$ , so $n = 7$ .

BUTTERWORTH SECTION Q VALUES

Q_{k} = \frac{1}{2 sin ( \frac{( 2 k - 1 ) π}{2 n} )}, k = 1, 2, \dots, ⌊ \frac{n}{2} ⌋

Each complex-pole pair becomes one second-order section, all with $ω_{0} = ω_{c}$ . When n is odd, add one first-order section with its cut-off at $ω_{c}$ .

Order n	Sections	Stage Q values	Equal-component Sallen-Key gains, $K = 3 - 1/ Q$
1	one first-order	—	—
2	one second-order	0.707	1.586
3	first-order + second-order	1.000	2.000
4	two second-order	0.541, 1.307	1.152, 2.235
5	first-order + two second-order	0.618, 1.618	1.382, 2.382
6	three second-order	0.518, 0.707, 1.932	1.068, 1.586, 2.482

Designing an equal-component Sallen-Key Butterworth stage

Choose a convenient capacitor value C for both capacitors.
Set both resistors to $R = 1/ (2 π f_{c} C)$ ; the same R serves a low-pass or a high-pass.
Set $K = 3 - 1/ Q$ from the table (1.586 for a single second-order Butterworth stage).
Pick $R_{a}$ and set $R_{f} = (K - 1) R_{a}$ .
The passband gain is then K, not 1. Because K fixes Q, it cannot be chosen freely; if another overall gain is needed, add an attenuator or a separate gain stage.

WORKED EXAMPLE · EXAMPLE 1: AN EQUAL-COMPONENT BUTTERWORTH LOW-PASS

Design a second-order Butterworth low-pass filter with a cut-off of 1 kHz using the equal-component Sallen-Key circuit with C = 10 nF and $R_{a}$ = 10 kΩ (ideal op-amp). Find R, $R_{f}$ , the passband gain in dB, the gain at 1 kHz, and the attenuation relative to the passband at 10 kHz.

Solution

Equal components: $f_{c} = f_{0} = 1/ (2 π R C)$ , so $R = \frac{1}{2 π \times 1 0 ^{3} \times 10 \times 1 0 ^{- 9}} = 15.92$ kΩ (use 15.9 kΩ for both resistors).
Butterworth needs $Q = 1/ 2$ , so $3 - K = 2$ and $K = 1.586$ . Then $R_{f} = (K - 1) R_{a} = 0.586 \times 10 = 5.86$ kΩ.
Passband (DC) gain $= K = 1.586$ , i.e. $20 lo g_{10} 1.586 = 4.0$ dB.
At $f = f_{c}$ : $∣ H ∣ = K Q = 1.586 \times 0.707 = 1.121 = K / 2$ , 3 dB below the passband, as every Butterworth response is at its cut-off.
At 10 kHz: $∣ H ∣ = K / 1 + 1 0^{4} = 1.586/100.005 = 0.0159$ . Relative to the passband this is $- 10 lo g_{10} (1 + 1 0^{4}) = - 40.0$ dB: 40 dB/decade for $n = 2$ .

Answer: R = 15.9 kΩ (both), $R_{f}$ = 5.86 kΩ; passband gain 1.586 (4.0 dB); |H| = 1.12 at 1 kHz; 40 dB below the passband at 10 kHz.

EXAM TIP

In a Butterworth cascade the individual stages are not Butterworth: in a fourth-order design the $Q = 1.307$ stage peaks on its own, and only the product of the two stages is maximally flat. The overall passband gain is the product of the stage gains ( $1.152 \times 2.235 = 2.575$ for the equal-component fourth-order design).

Band-pass, notch and all-pass filters

A band-pass filter passes the band between a lower cut-off $f_{L}$ and an upper cut-off $f_{H}$ . When the band is wide ( $f_{H} ≫ f_{L}$ ), cascade a high-pass with cut-off $f_{L}$ and a low-pass with cut-off $f_{H}$ : the passband gain is then very nearly the product of the two stage gains, and each overall cut-off very nearly equals its own stage's cut-off. As the two cut-offs approach each other the stages interact. Two first-order stages with cut-offs $f_{1} < f_{2}$ make a second-order band-pass with centre $f_{0} = f_{1} f_{2}$ , overall −3 dB bandwidth $f_{1} + f_{2}$ (not $f_{2} - f_{1}$ ), gain at $f_{0}$ equal to the product of the stage gains times $f_{2} / (f_{1} + f_{2})$ , and $Q = f_{1} f_{2} / (f_{1} + f_{2})$ , which can never exceed 1/2. For a narrow band (high Q), use a single second-order band-pass section such as the multiple-feedback (MFB) circuit below.

BAND-PASS RELATIONS

B W = f_{H} - f_{L}, f_{0} = f_{L} f_{H}, Q = \frac{f _{0}}{B W}

$f_{L}$ and $f_{H}$ are the −3 dB frequencies of the overall response. Exact for any second-order band-pass ( $f_{L} f_{H} = f_{0}^{2}$ and $f_{H} - f_{L} = f_{0} / Q$ ): the centre is the geometric, not the arithmetic, mean of the cut-offs. For a cascade of first-order stages, the stage cut-offs $f_{1}$ and $f_{2}$ are not the overall $f_{L}$ and $f_{H}$ unless $f_{2} ≫ f_{1}$ (see above), although the gain always peaks at $f_{1} f_{2}$ .

MULTIPLE-FEEDBACK BAND-PASS (EQUAL CAPACITORS)

f_{0} = \frac{1}{2 π C} \frac{R _{1} + R _{3}}{R _{1} R _{2} R _{3}}, B W = \frac{1}{π R _{2} C}, Q = π f_{0} R_{2} C, A_{0} = - \frac{R _{2}}{2 R _{1}}

Circuit: $R_{1}$ from the input to node A, $R_{3}$ from A to ground, one capacitor C from A to the − terminal and another C from A to the output, $R_{2}$ from the − terminal to the output, + terminal grounded. $A_{0}$ is the (inverting) gain at $f_{0}$ . BW and $A_{0}$ do not depend on $R_{3}$ , so $R_{3}$ tunes $f_{0}$ alone. A positive $R_{3}$ requires $∣ A_{0} ∣ < 2 Q^{2}$ .

Notch (band-reject). A notch removes a narrow band around $f_{0}$ (for example 50 Hz mains hum) and passes everything else. Two common realisations: (i) a twin-T network (one T of two resistors R with a capacitor 2C to ground, in parallel with a T of two capacitors C with a resistor R/2 to ground), which gives a null at $f_{0} = 1/ (2 π R C)$ but on its own has only $Q = 1/4$ , so its grounded node is driven from a fraction of the buffered output to raise Q; (ii) subtracting a unity-centre-gain band-pass output from the input, which produces exactly the standard notch form. A wide-band reject filter is a low-pass (cut-off $f_{L}$ ) and a high-pass (cut-off $f_{H} > f_{L}$ ) in parallel, with their outputs summed.

NOTCH FROM A BAND-PASS

1 - \frac{( ω _{0} / Q ) s}{s ^{2} + ( ω _{0} / Q ) s + ω _{0}^{2}} = \frac{s ^{2} + ω _{0}^{2}}{s ^{2} + ( ω _{0} / Q ) s + ω _{0}^{2}}

Zeros on the $j ω$ axis at $\pm j ω_{0}$ give a true null (zero output) at $ω_{0}$ ; the −3 dB rejection bandwidth is $ω_{0} / Q$ .

FIRST-ORDER ALL-PASS (PHASE SHIFTER)

H (s) = \frac{1 - s R C}{1 + s R C}, ∣ H (j ω) ∣ = 1, ∠ H = - 2 tan^{- 1} (ω R C)

The input drives both op-amp inputs: through $R_{1}$ to the − terminal (with $R_{f} = R_{1}$ from the output to the − terminal), and through R to the + terminal, with C from the + terminal to ground. Then $v_{+} = v_{i} / (1 + s R C)$ and $v_{o} = 2 v_{+} - v_{i}$ . The gain is 1 at every frequency; the phase goes from $0^{\circ}$ at DC through $- 9 0^{\circ}$ at $ω = 1/ R C$ towards $- 18 0^{\circ}$ . Swapping R and C gives $H (s) = (s R C - 1) / (1 + s R C)$ , phase $18 0^{\circ} - 2 tan^{- 1} (ω R C)$ .

EXAM TIP

Do not take the centre frequency as the arithmetic mean. If the overall −3 dB frequencies of a second-order band-pass are $f_{L} = 1$ kHz and $f_{H} = 9$ kHz, $f_{0} = 1 \times 9 = 3$ kHz, not 5 kHz, and $Q = 3/8 = 0.375$ .

Comparators and Schmitt triggers

Comparator. An op-amp with no feedback compares $v_{+}$ with $v_{-}$ and swings to a rail. Apply the signal to one input and a reference $V_{R}$ to the other. With the signal on the + terminal (non-inverting comparator) the output is $+ V_{s a t}$ whenever $v_{in} > V_{R}$ ; with the signal on the − terminal (inverting comparator) the output is $+ V_{s a t}$ whenever $v_{in} < V_{R}$ . With $V_{R} = 0$ the circuit is a zero-crossing detector: a sine input becomes a square wave of the same frequency with 50% duty cycle. A comparator with a non-zero reference is also called a level detector. Two comparators with references $V_{L} < V_{U}$ and their outputs combined form a window comparator, which indicates whether $v_{in}$ lies between $V_{L}$ and $V_{U}$ .

COMPARATOR (OPEN LOOP)

v_{o} = {+ V_{s a t}, - V_{s a t}, v_{+} > v_{-} v_{+} < v_{-}

Ideal op-amp, no feedback: the virtual-short rule $v_{+} = v_{-}$ does NOT apply. If the output is limited by a series resistor followed by back-to-back Zener diodes from the limited output node to ground, the levels become $\pm (V_{Z} + V_{D})$ (constant-drop diode model, $V_{D} \approx 0.7$ V).

DUTY CYCLE OF A COMPARATOR DRIVEN BY A SINE WAVE

D = \frac{1}{2} - \frac{1}{π} sin^{- 1} (\frac{V _{R}}{V _{m}})

Non-inverting comparator, input $V_{m} sin ω t$ , reference $V_{R}$ with $∣ V_{R} ∣ < V_{m}$ ; D is the fraction of each period with the output at $+ V_{s a t}$ , and $sin^{- 1}$ is in radians. For the inverting comparator the fraction is $\frac{1}{2} + \frac{1}{π} sin^{- 1} (V_{R} / V_{m})$ . $V_{R} = 0$ gives exactly one half.

Practical limits. (1) With a finite open-loop gain $A_{O L}$ , the input must differ from $V_{R}$ by at least $V_{s a t} / A_{O L}$ to saturate the output (13 V / $1 0^{5}$ = 130 µV); this is the comparator's resolution. (2) The output cannot change faster than the slew rate SR, so a full swing takes about $2 V_{s a t} / SR$ . (3) A slowly varying signal carrying noise crosses the reference several times near each crossing, so the output chatters. Positive feedback, the Schmitt trigger, cures (3) and also sharpens the transition.

Schmitt trigger (regenerative comparator). A fraction of the output is fed back to the + terminal. The feedback is positive, so the circuit has two stable states and the switching point depends on the present output: there is an upper threshold $V_{U T}$ (crossed while the input rises) and a lower threshold $V_{L T}$ (crossed while it falls). Their difference is the hysteresis width $V_{H}$ . Noise smaller than $V_{H}$ peak to peak cannot make the output chatter. In both circuits below, $R_{2}$ is the feedback resistor from the output to the + terminal.

INVERTING SCHMITT TRIGGER

V_{U T} V_{H} = \frac{R _{1} V _{s a t} + R _{2} V _{R}}{R _{1} + R _{2}}, V_{L T} = \frac{- R _{1} V _{s a t} + R _{2} V _{R}}{R _{1} + R _{2}} = V_{U T} - V_{L T} = \frac{2 R _{1} V _{s a t}}{R _{1} + R _{2}}

Input to the − terminal; $R_{1}$ from the + terminal to the reference $V_{R}$ (ground if $V_{R} = 0$ ), $R_{2}$ from the output to the + terminal. By superposition $v_{+} = (R_{1} v_{o} + R_{2} V_{R}) / (R_{1} + R_{2})$ with $v_{o} = \pm V_{s a t}$ . With $V_{R} = 0$ : $V_{U T} = + β V_{s a t}$ , $V_{L T} = - β V_{s a t}$ , $β = R_{1} / (R_{1} + R_{2})$ . The output goes LOW when $v_{in}$ rises above $V_{U T}$ and HIGH when it falls below $V_{L T}$ . The loop is centred at $R_{2} V_{R} / (R_{1} + R_{2})$ .

NON-INVERTING SCHMITT TRIGGER

V_{U T} V_{H} = V_{R} (1 + \frac{R _{1}}{R _{2}}) + \frac{R _{1}}{R _{2}} V_{s a t}, V_{L T} = V_{R} (1 + \frac{R _{1}}{R _{2}}) - \frac{R _{1}}{R _{2}} V_{s a t} = \frac{2 R _{1} V _{s a t}}{R _{2}}

Input through $R_{1}$ to the + terminal, $R_{2}$ from the output to the + terminal, reference $V_{R}$ on the − terminal (ground if $V_{R} = 0$ ). Switching happens when $v_{+} = (R_{2} v_{in} + R_{1} v_{o}) / (R_{1} + R_{2})$ reaches $V_{R}$ . With $V_{R} = 0$ : $V_{U T} = + (R_{1} / R_{2}) V_{s a t}$ and $V_{L T} = - (R_{1} / R_{2}) V_{s a t}$ . The output goes HIGH when $v_{in}$ rises above $V_{U T}$ and LOW when it falls below $V_{L T}$ .

UNEQUAL SATURATION LEVELS

V_{U T} = β V_{s a t}^{+}, V_{L T} = β V_{s a t}^{-}, β = \frac{R _{1}}{R _{1} + R _{2}}

Inverting Schmitt trigger with $V_{R} = 0$ and output levels $V_{s a t}^{+}$ and $V_{s a t}^{-}$ (the latter negative); the loop is then not centred on zero. For a Zener-limited output use the limited levels in place of the saturation levels.

	Inverting Schmitt	Non-inverting Schmitt
Signal applied to	− terminal, directly	+ terminal, through $R_{1}$
Thresholds with $V_{R} = 0$	$\pm \frac{R _{1}}{R _{1} + R _{2}} V_{s a t}$	$\pm \frac{R _{1}}{R _{2}} V_{s a t}$
Output for a large positive input	$- V_{s a t}$	$+ V_{s a t}$
Rising input crossing $V_{U T}$ sends the output	Low	High
Loop on the $v_{o}$ versus $v_{in}$ plot is traversed	Clockwise	Counter-clockwise
Current drawn from the signal source	None (ideal op-amp)	Flows through $R_{1}$ , so the source is loaded

Procedure for any positive-feedback switching circuit

Check which terminal the feedback resistor returns to. The + terminal means positive feedback and a two-state circuit: do not use $v_{+} = v_{-}$ as a circuit law.
Write $v_{+}$ (and $v_{-}$ ) by superposition in terms of $v_{o}$ , the input and any reference.
The output switches at the instant $v_{+} = v_{-}$ ; solve that equation for the input voltage.
Substitute $v_{o} = + V_{s a t}$ for one threshold and $v_{o} = - V_{s a t}$ for the other, then identify $V_{U T}$ as the one crossed while the input rises.
Trace the input waveform in time, switching the output only when the input crosses the threshold that belongs to the present output state.

WORKED EXAMPLE · EXAMPLE 2: A SCHMITT TRIGGER WITH A REFERENCE AND A SINE INPUT

An inverting Schmitt trigger uses $R_{1}$ = 10 kΩ from the + terminal to a reference $V_{R} = + 3$ V and $R_{2}$ = 20 kΩ from the output to the + terminal. The output saturates at ±12 V. The input is $v_{in} = 10 sin ω t$ V. Find $V_{U T}$ , $V_{L T}$ , the hysteresis width, and the fraction of each period (in steady state) for which the output is at +12 V.

Solution

Superposition at the + terminal: $v_{+} = \frac{R _{1} v _{o} + R _{2} V _{R}}{R _{1} + R _{2}} = \frac{10 v _{o} + 20 \times 3}{30} = \frac{v _{o}}{3} + 2$ V.
$v_{o} = + 12$ V gives $V_{U T} = 4 + 2 = 6$ V; $v_{o} = - 12$ V gives $V_{L T} = - 4 + 2 = - 2$ V. Hysteresis $V_{H} = 8$ V, centred at 2 V.
In steady state the input was last below −2 V (it reaches −10 V), so the output is at +12 V as the input rises. It goes low when $10 sin θ$ rises through 6 V: $θ_{1} = sin^{- 1} 0.6 = 36.8 7^{\circ}$ .
It returns high when the input falls through −2 V, on the falling part of the wave: $θ_{2} = 18 0^{\circ} + sin^{- 1} 0.2 = 191.5 4^{\circ}$ .
The output is low for $191.5 4^{\circ} - 36.8 7^{\circ} = 154.6 7^{\circ}$ of every $36 0^{\circ}$ and high for $205.3 3^{\circ}$ , a fraction $205.33/360 = 0.570$ .

Answer: $V_{U T}$ = 6 V, $V_{L T}$ = −2 V, $V_{H}$ = 8 V; the output is at +12 V for 57.0% of each period.

EXAM TIP

A resistor in series with the − terminal of an inverting Schmitt trigger carries no current and does not affect the thresholds; in the non-inverting circuit, $R_{1}$ is part of the divider and does. Use the saturation level actually given: if the question says the output saturates at ±13.5 V on ±15 V supplies, the thresholds use 13.5 V.

Op-amp multivibrators and square/triangle generators

A multivibrator is a two-state switching circuit. The bistable (two stable states) is the Schmitt trigger itself. The monostable has one stable state: a trigger flips it for a time set by an RC network, after which it returns. The astable has no stable state and oscillates freely, producing a square wave. All the timing in these circuits, and in the 555, comes from one fact: a capacitor charging through a resistor toward a target voltage.

RC TIMING (CHARGE OR DISCHARGE TOWARD A TARGET)

t = R C ln (\frac{V _{f ina l} - V _{ini t ia l}}{V _{f ina l} - V _{s w i t c h}})

Time for a capacitor charging or discharging through R, from $V_{ini t ia l}$ toward the asymptote $V_{f ina l}$ , to reach $V_{s w i t c h}$ (which must lie between the two). Every period and pulse-width formula in this section and the 555 section is this formula with specific values.

OP-AMP ASTABLE MULTIVIBRATOR

T = 2 R C ln (\frac{1 + β}{1 - β}), β = \frac{R _{1}}{R _{1} + R _{2}}

An inverting Schmitt trigger ( $R_{1}$ from the + terminal to ground, $R_{2}$ from the output to the + terminal) with R from the output to the − terminal and C from the − terminal to ground. With symmetric $\pm V_{s a t}$ , each half-period the capacitor charges from $\mp β V_{s a t}$ toward $\pm V_{s a t}$ until it reaches $\pm β V_{s a t}$ , so the output is a square wave with 50% duty cycle and T does not depend on $V_{s a t}$ . The capacitor voltage is a chain of exponential segments, not a true triangle. $R_{1} = R_{2}$ gives $T = 2 R C ln 3 = 2.197 R C$ ; $R_{1} = 0.86 R_{2}$ gives $T \approx 2 R C$ .

OP-AMP MONOSTABLE MULTIVIBRATOR

T = R C ln (\frac{1 + V _{D} / V _{s a t}}{1 - β}) \approx R C ln (\frac{1}{1 - β}) (V_{D} ≪ V_{s a t})

The astable above with a diode across C (anode at the − terminal) that clamps $v_{C}$ at $+ V_{D}$ (constant-drop model, $V_{D} \approx 0.7$ V) while $v_{o} = + V_{s a t}$ ; this stable state needs $β V_{s a t} > V_{D}$ . A negative trigger pulse at the + terminal sends $v_{o}$ to $- V_{s a t}$ ; C then charges from $+ V_{D}$ toward $- V_{s a t}$ , and the circuit flips back when $v_{C}$ reaches $- β V_{s a t}$ . With $β = 0.5$ and $V_{D}$ neglected, $T = R C ln 2 = 0.693 R C$ . After the pulse, C must recover to $+ V_{D}$ before the next trigger.

Square and triangle generator. A non-inverting Schmitt trigger drives an inverting integrator, and the integrator output is fed back as the Schmitt trigger's input. While the square wave is at $+ V_{s a t}$ the integrator output ramps down at the constant rate $V_{s a t} / R C$ ; when it reaches $V_{L T}$ the Schmitt trigger flips and the ramp reverses. The Schmitt trigger must be the non-inverting type because the integrator already inverts: each ramp must head toward the threshold that will flip it.

SQUARE/TRIANGLE GENERATOR

V_{p} = \frac{R _{1}}{R _{2}} V_{s a t}, f = \frac{R _{2}}{4 R _{1} R C}

Schmitt trigger: $R_{1}$ from the triangle output to the + terminal, $R_{2}$ from the square output to the + terminal, − terminal grounded. Integrator: input resistor R, feedback capacitor C. The triangle swings between $\pm V_{p}$ (peak-to-peak $2 V_{p}$ ; needs $R_{1} < R_{2}$ ) and the square between $\pm V_{s a t}$ . From $T /2 = 2 V_{p} / (V_{s a t} / R C)$ ; f is independent of $V_{s a t}$ because the ramp rate and the thresholds both scale with it.

Unequal ramp rates (for example two diode-steered integrator input resistors) give an asymmetric triangle and a square wave whose duty cycle is not 50%; making one slope much faster than the other gives a sawtooth. Making the ramp current proportional to an input voltage turns the circuit into a VCO (see the last section).

Type	Stable states	Trigger needed?	Output	Op-amp circuit
Bistable	2	Yes, to change state	A level that remembers the last threshold crossed	Schmitt trigger
Monostable (one-shot)	1	Yes	One pulse of fixed width T per trigger	Astable plus a clamp diode across C and a trigger input at the + terminal
Astable (free-running)	0	No	Continuous square wave	Schmitt trigger with RC feedback to the − terminal

The 555 timer

Inside the 555. Three equal internal resistors across $V_{C C}$ set two references: $\frac{2}{3} V_{C C}$ for the threshold comparator (pin 6) and $\frac{1}{3} V_{C C}$ for the trigger comparator (pin 2). When the trigger pin falls below $\frac{1}{3} V_{C C}$ , the internal SR flip-flop is set: the output (pin 3) goes high and the discharge transistor (pin 7) turns off. When the threshold pin rises above $\frac{2}{3} V_{C C}$ , the flip-flop is reset: the output goes low and the discharge transistor turns on, pulling pin 7 to ground. Pin 5 (control voltage) sits at the upper reference, $\frac{2}{3} V_{C C}$ , and is normally bypassed to ground with a small capacitor; driving it to $V_{C O N}$ moves the references to $V_{C O N}$ and $V_{C O N} /2$ . Pin 4 (reset) is active-low and is tied to $V_{C C}$ when unused.

555 MONOSTABLE PULSE WIDTH

T = R C ln 3 \approx 1.1 R C

R from $V_{C C}$ to pins 6 and 7, C from there to ground, trigger on pin 2. In the stable state the output is low and C is held discharged. A trigger below $\frac{1}{3} V_{C C}$ sets the output high; C charges from 0 toward $V_{C C}$ , and the pulse ends when $v_{C} = \frac{2}{3} V_{C C}$ . The trigger must return above $\frac{1}{3} V_{C C}$ before T ends (a narrow trigger pulse); in the basic circuit, further triggers during the pulse do not extend it. T does not depend on $V_{C C}$ .

555 ASTABLE

t_{H} T = (R_{A} + R_{B}) C ln 2 \approx 0.693 (R_{A} + R_{B}) C, t_{L} = R_{B} C ln 2 \approx 0.693 R_{B} C = 0.693 (R_{A} + 2 R_{B}) C, f = \frac{1.443}{( R _{A} + 2 R _{B} ) C}, D = \frac{t _{H}}{T} = \frac{R _{A} + R _{B}}{R _{A} + 2 R _{B}}

$R_{A}$ from $V_{C C}$ to pin 7, $R_{B}$ from pin 7 to pins 6 and 2, C from pins 6 and 2 to ground. C charges through $R_{A} + R_{B}$ and discharges through $R_{B}$ alone, between $\frac{1}{3} V_{C C}$ and $\frac{2}{3} V_{C C}$ (a ratio of 2 each way, hence $ln 2$ ). With D defined as high time over period, D is always above one half and approaches it only when $R_{B} ≫ R_{A}$ . $R_{A}$ must not be zero, or pin 7 shorts $V_{C C}$ to ground when the discharge transistor turns on.

555 ASTABLE WITH A DIODE ACROSS R_B

t_{H} = 0.693 R_{A} C, t_{L} = 0.693 R_{B} C, D = \frac{R _{A}}{R _{A} + R _{B}}

A diode across $R_{B}$ (anode at pin 7) bypasses $R_{B}$ while C charges, so C charges through $R_{A}$ only and discharges through $R_{B}$ only. Ideal-diode result; with a real diode drop, $t_{H}$ comes out somewhat longer. $R_{A} = R_{B}$ gives a 50% duty cycle, and duty cycles below 50% become possible.

555 WITH THE CONTROL-VOLTAGE PIN DRIVEN

Astable: t_{H} Monostable: T = (R_{A} + R_{B}) C ln (\frac{V _{C C} - V _{C O N} /2}{V _{C C} - V _{C O N}}), t_{L} = R_{B} C ln 2 = R C ln (\frac{V _{C C}}{V _{C C} - V _{C O N}})

Pin 5 driven to $V_{C O N} < V_{C C}$ moves the thresholds to $V_{C O N}$ and $V_{C O N} /2$ . $t_{L}$ is unaffected (the discharge still halves $v_{C}$ ), while raising $V_{C O N}$ lengthens $t_{H}$ and lowers f. This is how a 555 becomes a voltage-controlled oscillator and, in monostable mode, a pulse-width modulator. $V_{C O N} = \frac{2}{3} V_{C C}$ recovers the standard formulas.

EXAM TIP

Four 555 traps. (1) The first high time after power-up is longer, $(R_{A} + R_{B}) C ln 3$ , because C starts from 0 instead of $\frac{1}{3} V_{C C}$ . (2) The basic astable cannot give a duty cycle of 50% or less (with D = high time/period); a question that needs one implies a diode, an inverter or a driven control pin. (3) Some questions define duty cycle as low time over period, so read the definition. (4) Changing $V_{C C}$ alone does not change the timing, because the thresholds and the charging target scale together; changing $V_{C O N}$ does.

WORKED EXAMPLE · EXAMPLE 3: A 555 ASTABLE, THEN ITS CONTROL PIN DRIVEN

A 555 astable runs from $V_{C C} = 12$ V with $R_{A}$ = 4.7 kΩ, $R_{B}$ = 10 kΩ and C = 10 nF. (a) With pin 5 bypassed, find $t_{H}$ , $t_{L}$ , the frequency and the duty cycle (high time/period). (b) Pin 5 is now driven by a 6 V source. Find the new frequency and duty cycle.

Solution

(a) $t_{H} = 0.693 (R_{A} + R_{B}) C = 0.693 \times 14.7 k Ω \times 10 nF = 101.9$ µs and $t_{L} = 0.693 \times 10 k Ω \times 10 nF = 69.3$ µs.
$T = 171.2$ µs, so $f = 5.84$ kHz, and $D = 14.7/24.7 = 0.595$ .
(b) The thresholds become $V_{C O N} = 6$ V and $V_{C O N} /2 = 3$ V. Charging from 3 V toward 12 V until 6 V: $t_{H} = (R_{A} + R_{B}) C ln \frac{12 - 3}{12 - 6} = 147 μ s \times ln 1.5 = 59.6$ µs.
Discharging from 6 V toward 0 until 3 V: $t_{L} = R_{B} C ln 2 = 69.3$ µs, unchanged.
$T = 128.9$ µs, $f = 7.76$ kHz and $D = 59.6/128.9 = 0.462$ . Lowering $V_{C O N}$ below its normal $\frac{2}{3} V_{C C} = 8$ V raised the frequency and here pushed the duty cycle below one half, which the resistor ratio alone never can.

Answer: (a) $t_{H}$ = 101.9 µs, $t_{L}$ = 69.3 µs, f = 5.84 kHz, D = 59.5%. (b) f = 7.76 kHz, D = 46.2%.

VCOs and the phase-locked loop

A voltage-controlled oscillator (VCO) produces a periodic output whose frequency is set by a control voltage $v_{c}$ . Over its useful range the characteristic is taken as linear about the free-running (centre) frequency $f_{f r}$ . In a PLL, $f_{f r}$ is the VCO frequency when the loop's control voltage is zero, i.e. at the VCO's bias point. Op-amp VCOs use the square/triangle generator with a ramp current proportional to $v_{c}$ ; a 555 becomes a VCO when its pin 5 is driven; LC oscillators are tuned by a varactor diode, whose capacitance falls as its reverse bias rises.

VCO CHARACTERISTIC

f_{o} = f_{f r} + K_{v} v_{c} or ω_{o} = ω_{f r} + K_{o} v_{c}, K_{o} = 2 π K_{v}

$K_{v}$ in Hz/V, $K_{o}$ in (rad/s)/V. Linear model. Check which unit a question uses before multiplying.

INTEGRATOR-SCHMITT VCO

f_{o} = \frac{v _{c}}{2 R C V _{H}}

An integrator (input resistor R, feedback capacitor C) whose input is switched between $+ v_{c}$ and $- v_{c}$ by a Schmitt trigger of hysteresis width $V_{H}$ . Each half-period the ramp, of slope $v_{c} / R C$ , crosses $V_{H}$ , so $T /2 = V_{H} R C / v_{c}$ . The frequency is proportional to $v_{c}$ ( $v_{c} > 0$ ), so this characteristic passes through the origin; used in a PLL, the VCO is biased so that zero loop control voltage gives $f_{f r}$ .

Phase-locked loop. A PLL is a negative-feedback loop on phase, built from three blocks: a phase detector (PD), whose average output depends on the phase difference between the input and the VCO output; a loop filter (low-pass), which removes the PD's ripple at the sum frequency and sets the loop dynamics; and the VCO, driven by the filter output. When the loop is locked, the VCO frequency equals the input frequency exactly, because any remaining frequency difference would make the phase difference grow without limit. What remains is a constant phase error $θ_{e}$ , just large enough to produce the control voltage that holds the VCO at the input frequency. $θ_{e}$ is measured from the PD's zero-output point: for a multiplier with sine inputs and for an XOR detector, that point is a $9 0^{\circ}$ phase difference between the two inputs.

PHASE-DETECTOR CHARACTERISTICS

Multiplier: \overset{v}{ˉ}_{d} XOR, square inputs: \overset{v}{ˉ}_{d} = K_{d} sin θ_{e} \approx K_{d} θ_{e} (small θ_{e}) = \frac{V _{D D}}{π} ϕ, 0 \leq ϕ \leq π

Multiplier of gain $K_{m}$ : inputs $V_{1} sin (ω t + θ_{i})$ and $V_{2} cos (ω t + θ_{o})$ average to $\frac{K _{m} V _{1} V _{2}}{2} sin (θ_{i} - θ_{o})$ , so $K_{d} = K_{m} V_{1} V_{2} /2$ V/rad ( $V_{1} V_{2} /2$ for unit multiplier gain). XOR with logic levels 0 and $V_{D D}$ : with 50% duty-cycle square waves a phase difference $ϕ$ apart, the output is high for a fraction $ϕ / π$ of the time, so $K_{d} = V_{D D} / π$ V/rad; $θ_{e} = ϕ - π /2$ , measured from the midpoint output $V_{D D} /2$ .

LOCKED LOOP: CONTROL VOLTAGE AND STATIC PHASE ERROR

v_{c} = \frac{ω _{i} - ω _{f r}}{K _{o}}, θ_{e} = \frac{ω _{i} - ω _{f r}}{K _{d} K _{o} F ( 0 )} = \frac{ω _{i} - ω _{f r}}{K _{V}}, K_{V} = K_{d} K_{o} F (0)

Locked loop, linear PD model $\overset{v}{ˉ}_{d} = K_{d} θ_{e}$ , loop-filter DC gain $F (0)$ , so $v_{c} = F (0) K_{d} θ_{e}$ . $K_{V}$ (units 1/s) is the DC loop gain; the $2 π$ cancels if both the offset and the VCO gain are in Hz. A larger $K_{V}$ gives a smaller phase error for the same offset. With a sinusoidal PD, the second relation gives $sin θ_{e}$ instead of $θ_{e}$ .

LOCK (HOLD-IN) RANGE

Δ ω_{L} = \pm K_{o} F (0) \overset{v}{ˉ}_{d, ma x}; multiplier: \pm K_{V}, XOR: \pm \frac{π}{2} K_{V}

$\overset{v}{ˉ}_{d, ma x}$ is the largest PD output measured from its zero point: $K_{d}$ for the multiplier (at $θ_{e} = \pm π /2$ ), and $K_{d} π /2$ for the XOR, whose characteristic is linear over $∣ θ_{e} ∣ \leq π /2$ . A loop that is already locked stays locked while the input moves up to this far from $ω_{f r}$ , i.e. as far as the largest available control voltage can pull the VCO (assuming the VCO itself can go that far). It depends on the filter's DC gain, not its bandwidth. Some questions quote the total width ( $2Δ f_{L}$ ) instead of the one-sided value; read the wording.

CAPTURE (PULL-IN) RANGE, SINGLE-POLE RC LOOP FILTER

Δ ω_{C} \approx \frac{Δ ω _{L}}{τ} ⟺ Δ f_{C} \approx \frac{1}{2 π} \frac{2 π Δ f _{L}}{τ}

One-sided ranges; loop filter $F (s) = 1/ (1 + s τ)$ with $F (0) = 1$ ; an approximation valid when $Δ ω_{C} τ ≫ 1$ . Starting unlocked, the PD output is a beat at the difference frequency $Δ ω$ , which the filter attenuates by about $1/ (Δ ω τ)$ ; the loop pulls in only if the attenuated beat still swings the VCO far enough, which gives $Δ ω_{C} \approx Δ ω_{L} / (Δ ω_{C} τ)$ . The capture range never exceeds the lock range. A narrower filter (larger $τ$ ) narrows the capture range and leaves the lock range unchanged.

LINEARISED PLL PHASE MODEL

\frac{θ _{o} ( s )}{θ _{i} ( s )} = \frac{K _{d} K _{o} F ( s )}{s + K _{d} K _{o} F ( s )}; F (s) = \frac{1}{1 + s τ} \Rightarrow ω_{n} = \frac{K _{d} K _{o}}{τ}, ζ = \frac{1}{2 K _{d} K _{o} τ}

The VCO integrates frequency into phase, $θ_{o} (s) = K_{o} V_{c} (s) / s$ , so the open-loop gain $K_{d} K_{o} F (s) / s$ always has a pole at the origin: a phase step leaves no steady-state error, while a frequency step leaves the constant static phase error above. With $F (s) = 1$ the loop is first-order with bandwidth $K_{d} K_{o}$ rad/s; the single-pole filter makes it second-order, and a larger $τ$ lowers both $ω_{n}$ and $ζ$ .

	Lock (hold-in, tracking) range	Capture (pull-in, acquisition) range
Starting condition	Loop already locked; the input drifts slowly	Loop unlocked when the input is applied
Set by	DC loop gain $K_{d} K_{o} F (0)$ and the PD's output limit	DC loop gain and the loop filter's bandwidth
Effect of a narrower loop filter	None	Shrinks
Relation	The wider of the two	Never wider than the lock range

Applications. With a divide-by-N counter between the VCO and the PD, lock forces $f_{o} / N = f_{in}$ , so $f_{o} = N f_{in}$ (frequency multiplication and synthesis; with a further divide-by-M on the reference input, $f_{o} = (N / M) f_{r e f}$ ). With an FM input the VCO tracks the input frequency, so the control voltage $v_{c} = Δ f / K_{v}$ is the demodulated message. Other uses include FSK demodulation, synchronous AM detection and clock recovery.

WORKED EXAMPLE · EXAMPLE 4: STATIC PHASE ERROR, LOCK RANGE AND CAPTURE RANGE

A PLL has a VCO with free-running frequency 500 kHz and gain $K_{v}$ = 50 kHz/V, a multiplier phase detector with $\overset{v}{ˉ}_{d} = 0.8 sin θ_{e}$ V, and a single-pole RC loop filter with DC gain 1 and time constant $τ$ = 1 ms. (a) The loop is locked to a 530 kHz input: find the control voltage and the static phase error. (b) Find the one-sided lock and capture ranges. (c) With the loop unlocked, a 520 kHz signal is applied. Does it lock?

Solution

(a) Locked, so the VCO runs at 530 kHz and $v_{c} = (530 - 500) /50 = 0.6$ V.
With $F (0) = 1$ : $0.8 sin θ_{e} = 0.6$ , so $θ_{e} = sin^{- 1} 0.75 = 48. 6^{\circ}$ (0.848 rad). The small-angle model $0.8 θ_{e} = 0.6$ would give 0.75 rad, about 12% low.
(b) The largest PD output is 0.8 V, so the VCO can be held within $\pm 0.8 \times 50 = \pm 40$ kHz of 500 kHz: lock range 460 kHz to 540 kHz.
Capture: $Δ f_{C} \approx \frac{1}{2 π} \frac{2 π \times 40 \times 1 0 ^{3}}{1 0 ^{- 3}} = \frac{1}{2 π} 2.513 \times 1 0^{8} = \frac{15853}{2 π} = 2.52$ kHz, i.e. about 497.5 kHz to 502.5 kHz. Check: $Δ ω_{C} τ = 15853 \times 1 0^{- 3} = 15.9 ≫ 1$ , so the approximation holds.
(c) 520 kHz is inside the lock range but 20 kHz from the centre, far outside the ±2.52 kHz capture range, so the unlocked loop does not acquire it. Had the loop been locked at 500 kHz with the input then swept slowly up to 520 kHz, it would have stayed locked.

Answer: (a) $v_{c}$ = 0.6 V, $θ_{e}$ = 48.6°. (b) Lock range ±40 kHz (460 kHz to 540 kHz); capture range about ±2.52 kHz. (c) No: 520 kHz is within the lock range but outside the capture range.

EXAM TIP

A locked PLL has zero frequency error, not zero phase error (with a simple RC filter or none). If a question asks for the VCO frequency in lock, it is the input frequency, times N if a divide-by-N sits in the feedback path; no calculation is needed. The control voltage and the phase error are where the numbers go.

PREVIOUS-YEAR QUESTIONS

13 questions from the EC and IN papers

Try each question first, then open the answer. One shows the official answer only. We placed each question under a topic ourselves; the exam paper does not label topics.

See these papers in full: GATE ECE 2025 · GATE ECE 2024 · GATE ECE 2022 · GATE ECE 2020 · GATE IN 2026 · GATE IN 2024 · GATE IN 2022 · GATE IN 2018

GATE 2026 IN Q.46

GATE 2026 · INQ.46 · 2 marks · MCQ

In the following active filter circuit with ideal op-amps, $R$ is $1 k Ω$ , $C$ is $1 μ F$ , and $V_{in}$ has an amplitude of $1 V$ at $1000 rad/s$ .

The amplitude of $V_{o u t}$ is ________ V.

GATE 2026 IN question 46: Three ideal op-amps in cascade. — Figure from the GATE 2026 IN paper. It is part of the question.

(A)
0.5
(B)
0.707
(C)
1.0
(D)
1.414

Answer and solution

GATE 2026 IN Q.46: answer and solution

GATE 2026 IN Q.61

GATE 2026 · INQ.61 · 2 marks · NAT

In the phase-locked-loop circuit shown below, the output of the VCO is a digital square wave.

If the input is a square wave at 10 kHz, the steady state frequency of the output is ________ kHz. (rounded off to the nearest integer)

GATE 2026 IN question 61: Block diagram of a PLL, left to right: 'Input' arrow into a '÷20 counter' block; — Figure from the GATE 2026 IN paper. It is part of the question.

Answer and solution

GATE 2026 IN Q.61: answer and solution

GATE 2025 EC Q.34

GATE 2025 · ECQ.34 · 1 mark · NAT

All the components in the bandpass filter given below are ideal. The lower $- 3$ dB frequency of the filter is 1 MHz.

The upper $- 3$ dB frequency (in MHz, rounded off to the nearest integer) is ________.

GATE 2025 EC question 34: Inverting op-amp bandpass filter. — Figure from the GATE 2025 EC paper. It is part of the question.

Answer and solution

GATE 2025 EC Q.34: answer and solution

GATE 2024 EC Q.49

GATE 2024 · ECQ.49 · 2 marks · MCQ

The opamps in the circuit shown are ideal, but have saturation voltages of $\pm 10 V$ .

[Figure]

Assume that the initial inductor current is $0 A$ . The input voltage ( $V_{i}$ ) is a triangular signal with peak voltages of $\pm 2 V$ and time period of $8 μ s$ . Which one of the following statements is true?

GATE 2024 EC question 49: Two op-amp stages in cascade. — Figure from the GATE 2024 EC paper. It is part of the question.

(A)
$V_{01}$ is delayed by $2 μ s$ relative to $V_{i}$ , and $V_{02}$ is a triangular waveform.
(B)
$V_{01}$ is not delayed relative to $V_{i}$ , and $V_{02}$ is a trapezoidal waveform.
(C)
$V_{01}$ is not delayed relative to $V_{i}$ , and $V_{02}$ is a triangular waveform.
(D)
$V_{01}$ is delayed by $1 μ s$ relative to $V_{i}$ , and $V_{02}$ is a trapezoidal waveform.

Answer and solution

GATE 2024 EC Q.49: answer and solution

GATE 2024 IN Q.43

GATE 2024 · INQ.43 · 2 marks · MCQ

In the figure shown, $R = 1 k Ω$ and $C = 0.1 μ F$ . For a dc gain of $- 10$ , the 3 dB cut-off frequency (rounded off to one decimal place) is

Assume the opamp is ideal.

GATE 2024 IN question 43: Inverting op-amp low-pass (integrator-type) filter. — Figure from the GATE 2024 IN paper. It is part of the question.

(A)
159.1 Hz
(B)
1591.5 Hz
(C)
1750.7 Hz
(D)
175.0 Hz

Answer and solution

GATE 2024 IN Q.43: answer and solution

GATE 2024 IN Q.52

GATE 2024 · INQ.52 · 2 marks · NAT

Consider the capacitive sensor circuit and its output voltage shown in the figure. The circuit is switched ON at $t = 0$ . Assuming the opamp to be ideal, the frequency of the output voltage $V_{o}$ is ______ kHz (rounded off to two decimal places).

GATE 2024 IN question 52: Left: an op-amp astable (relaxation oscillator) with supplies +V_CC and -V_EE. — Figure from the GATE 2024 IN paper. It is part of the question.

Answer and solution

GATE 2024 IN Q.52: answer and solution

GATE 2022 EC Q.26

GATE 2022 · ECQ.26 · 1 mark · MSQ

An ideal OPAMP circuit with a sinusoidal input is shown in the figure. The 3 dB frequency is the frequency at which the magnitude of the voltage gain decreases by 3 dB from the maximum value. Which of the options is/are correct?

GATE 2022 EC question 26: Inverting op-amp stage. — Figure from the GATE 2022 EC paper. It is part of the question.

(A)
The circuit is a low pass filter.
(B)
The circuit is a high pass filter.
(C)
The 3 dB frequency is 1000 rad/s.
(D)
The 3 dB frequency is $\frac{1000}{3}$ rad/s.

Answer and solution

GATE 2022 EC Q.26: answer and solution

GATE 2022 EC Q.41

GATE 2022 · ECQ.41 · 2 marks · MCQ

For the following circuit with an ideal OPAMP, the difference between the maximum and the minimum values of the capacitor voltage ( $V_{c}$ ) is ________.

GATE 2022 EC question 41: An ideal op-amp with supply rails +15 V (top) and −12 V (bottom). — Figure from the GATE 2022 EC paper. It is part of the question.

(A)
15 V
(B)
27 V
(C)
13 V
(D)
14 V

Answer and solution

GATE 2022 EC Q.41: answer and solution

GATE 2022 EC Q.42

GATE 2022 · ECQ.42 · 2 marks · MCQ

A circuit with an ideal OPAMP is shown. The Bode plot for the magnitude (in dB) of the gain transfer function $(A_{V} (j ω) = V_{o u t} (j ω) / V_{in} (j ω))$ of the circuit is also provided (here, $ω$ is the angular frequency in rad/s). The values of $R$ and $C$ are ________.

GATE 2022 EC question 42: Left: the circuit. — Figure from the GATE 2022 EC paper. It is part of the question.

(A)
$R = 3 k Ω, C = 1 μ F$
(B)
$R = 1 k Ω, C = 3 μ F$
(C)
$R = 4 k Ω, C = 1 μ F$
(D)
$R = 3 k Ω, C = 2 μ F$

Answer and solution

GATE 2022 EC Q.42: answer and solution

GATE 2022 IN Q.56

GATE 2022 · INQ.56 · 2 marks · NAT

The circuit shown is driven by a sinusoidal input voltage, $V_{in}$ , resulting in the output voltage, $V_{o u t}$ . The frequency (in kilohertz) at which the voltage gain is 0 dB is ________ (round off to two decimal places)

GATE 2022 IN question 56: Inverting op-amp circuit. — Figure from the GATE 2022 IN paper. It is part of the question.

Answer and solution

GATE 2022 IN Q.56: answer and solution

GATE 2020 EC Q.8

GATE 2020 · ECQ.8 · 1 mark · MCQ

The components in the circuit shown below are ideal. If the op-amp is in positive feedback and the input voltage $V_{i}$ is a sine wave of amplitude 1 V, the output voltage $V_{o}$ is

GATE 2020 EC question 8: An op-amp with supply rails +5 V (top) and −5 V (bottom). — Figure from the GATE 2020 EC paper. It is part of the question.

(A)
a non-inverted sine wave of 2 V amplitude.
(B)
an inverted sine wave of 1 V amplitude.
(C)
a square wave of 5 V amplitude.
(D)
a constant of either +5 V or −5 V.

Answer and solution

GATE 2020 EC Q.8: answer and solution

GATE 2020 EC Q.41

GATE 2020 · ECQ.41 · 2 marks · MCQ

The components in the circuit given below are ideal. If $R = 2 k Ω$ and $C = 1 μ F$ , the $- 3$ dB cut-off frequency of the circuit in Hz is

GATE 2020 EC question 41: Inverting op-amp circuit. — Figure from the GATE 2020 EC paper. It is part of the question.

Answer and solution

GATE 2020 EC Q.41: answer and solution

GATE 2018 IN Q.40

GATE 2018 · INQ.40 · 2 marks · NAT

In the given relaxation oscillator, the opamps and the zener diodes are ideal. The frequency (in kHz) of the square wave output $v_{o}$ is ______.

GATE 2018 IN question 40: Two op-amps in cascade. — Figure from the GATE 2018 IN paper. It is part of the question.

Official answer

Official answer: marks to all candidatesSource: Official answer key, GATE 2018 IN (IIT Guwahati)

GATE 2018 IN Q.40: official answer

PRACTICE

5 questions to test yourself

PRACTICE 11 mark · NAT

A 555 timer is wired as a monostable multivibrator with timing resistor R = 100 kΩ and timing capacitor C = 0.1 µF. The control-voltage pin is bypassed to ground through a capacitor and not otherwise driven, and the trigger pulse is much narrower than the output pulse. The width of the output pulse, in ms, is ______ (round off to two decimal places).

Answer and solution

Answer: $10.99$ (accepted range $\pm 0.1$ )

With pin 5 not driven, the thresholds are $\frac{1}{3} V_{C C}$ (trigger) and $\frac{2}{3} V_{C C}$ (threshold).
C charges from 0 toward $V_{C C}$ and the pulse ends at $\frac{2}{3} V_{C C}$ : $T = R C ln \frac{V _{C C} - 0}{V _{C C} - \frac{2}{3} V _{C C}} = R C ln 3$ .
$T = 100 \times 1 0^{3} \times 0.1 \times 1 0^{- 6} \times 1.0986 = 10.99$ ms (the rounded rule $1.1 R C$ gives 11.0 ms).

PRACTICE 21 mark · MCQ

An inverting Schmitt trigger is built with an ideal op-amp whose output saturates at ±13 V. The input is applied to the inverting terminal; a 10 kΩ resistor connects the non-inverting terminal to ground, and a 90 kΩ resistor connects the output to the non-inverting terminal. The upper threshold $V_{U T}$ , the lower threshold $V_{L T}$ and the hysteresis width $V_{H}$ are

(A)
$V_{U T} = + 1.3$ V, $V_{L T} = - 1.3$ V, $V_{H} = 2.6$ V
(B)
$V_{U T} = + 1.3$ V, $V_{L T} = - 1.3$ V, $V_{H} = 1.3$ V
(C)
$V_{U T} = + 1.44$ V, $V_{L T} = - 1.44$ V, $V_{H} = 2.89$ V
(D)
$V_{U T} = + 11.7$ V, $V_{L T} = - 11.7$ V, $V_{H} = 23.4$ V

Answer and solution

Answer: (A)

Feedback fraction $β = \frac{10}{10 + 90} = 0.1$ , so $v_{+} = 0.1 v_{o}$ .
$v_{o} = + 13$ V gives $V_{U T} = + 1.3$ V; $v_{o} = - 13$ V gives $V_{L T} = - 1.3$ V.
$V_{H} = V_{U T} - V_{L T} = 2.6$ V. Option C uses the ratio 10/90 (the non-inverting Schmitt formula) and option D uses 90/100.

PRACTICE 32 marks · NAT

An equal-component Sallen-Key low-pass filter uses $R_{1} = R_{2} = 10$ kΩ and $C_{1} = C_{2} = 10$ nF. The ideal op-amp is connected as a non-inverting amplifier with $R_{a}$ = 10 kΩ from the inverting terminal to ground and $R_{f}$ = 12 kΩ from the output to the inverting terminal. The magnitude of the voltage gain $∣ V_{o} / V_{i} ∣$ at $f = 1/ (2 π R_{1} C_{1})$ (about 1.59 kHz) is ______ (round off to two decimal places).

Answer and solution

Answer: $2.75$ (accepted range $\pm 0.02$ )

Amplifier gain $K = 1 + R_{f} / R_{a} = 1 + 12/10 = 2.2$ .
Equal components: $H (s) = \frac{K}{s ^{2} R ^{2} C ^{2} + s R C ( 3 - K ) + 1}$ , so $ω_{0} = 1/ R C$ and $Q = 1/ (3 - K) = 1/0.8 = 1.25$ .
At $ω = ω_{0}$ the $s^{2}$ term cancels the constant: $∣ H ∣ = \frac{K}{3 - K} = K Q = 2.2 \times 1.25 = 2.75$ .
The gain at $f_{0}$ exceeds the DC gain of 2.2 because $Q > 1/ 2$ , so the response peaks.

PRACTICE 42 marks · MSQ

A PLL has a VCO with free-running frequency 200 kHz and gain 25 kHz/V, with zero control voltage at the free-running frequency. Its phase detector gives an average output $\overset{v}{ˉ}_{d} = 0.5 θ_{e}$ V ( $θ_{e}$ in rad) for $∣ θ_{e} ∣ \leq π /2$ , and the loop loses lock if the required $∣ θ_{e} ∣$ exceeds $π /2$ . The loop filter has a DC gain of 1. The loop is locked to a 210 kHz input. Which of the following statements is/are correct?

(A)
The VCO output frequency is 210 kHz.
(B)
The VCO control voltage is 0.4 V.
(C)
The static phase error is 0.2 rad.
(D)
Once locked, the loop can track the input, as the input frequency is varied slowly, over approximately 180.4 kHz to 219.6 kHz.

Answer and solution

Answer: (A), (B), (D)

In lock the VCO frequency equals the input frequency, 210 kHz: A is correct.
$v_{c} = (210 - 200) /25 = 0.4$ V: B is correct.
$θ_{e} = v_{c} / (K_{d} F (0)) = 0.4/0.5 = 0.8$ rad, not 0.2 rad: C is wrong (0.2 comes from multiplying instead of dividing). Since $0.8 < π /2$ , the loop does hold lock at 210 kHz.
The largest control voltage is $0.5 \times π /2 = 0.785$ V, so the VCO can be held within $\pm 0.785 \times 25 = \pm 19.6$ kHz of 200 kHz, i.e. 180.4 kHz to 219.6 kHz: D is correct.

PRACTICE 52 marks · MCQ

A square/triangle generator uses a non-inverting Schmitt trigger followed by an inverting integrator, both built with ideal op-amps. In the Schmitt trigger, the integrator output is connected to the non-inverting terminal through $R_{1}$ = 10 kΩ, a resistor $R_{2}$ = 20 kΩ connects the Schmitt trigger's output to the same terminal, the inverting terminal is grounded, and the output saturates at ±12 V. The integrator is driven by the Schmitt trigger's output through an input resistor R = 10 kΩ and has a feedback capacitor C = 50 nF. The peak value of the triangular wave and the oscillation frequency are

(A)
6 V and 1 kHz
(B)
6 V and 2 kHz
(C)
24 V and 250 Hz
(D)
12 V and 1 kHz

Answer and solution

Answer: (A)

The Schmitt trigger switches when $v_{+} = \frac{R _{2} v _{t r i} + R _{1} v _{s q}}{R _{1} + R _{2}} = 0$ , i.e. at $v_{t r i} = - \frac{R _{1}}{R _{2}} v_{s q} = \mp 6$ V. The triangle swings between −6 V and +6 V: peak 6 V.
The integrator ramps at $V_{s a t} / R C = 12/ (1 0^{4} \times 50 \times 1 0^{- 9}) = 2.4 \times 1 0^{4}$ V/s.
Half-period $= 12 V / (2.4 \times 1 0^{4} V/s) = 0.5$ ms, so $T = 1$ ms and $f = 1$ kHz. Check: $f = R_{2} / (4 R_{1} R C) = 20/ (4 \times 10 \times 5 \times 1 0^{- 4}) = 1000$ Hz.
Option C swaps $R_{1}$ and $R_{2}$ (and a 24 V peak is impossible with ±12 V rails).

OFFICIAL GATE 2027 SYLLABUS WORDING

Copied from the GATE 2027 syllabus; see all 2027 syllabi.

GATE EC

active filters, Schmitt trigger

GATE EE

single stage active filters, Active Filters: Sallen Key, Butterworth, VCOs and timers … Schmitt triggers

GATE IN

active filters, comparators, Schmitt trigger, multivibrators, oscillators, signal generators, voltage-controlled oscillators and phase-locked loop

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